Introduction: Grid Tie Inverter V5

About: Did Physics for my undergraduate, absolutely love building things particularly electronics projects

The aim is to build an open source 1kW bidirectional inverter. Version 4 made good ground but more work is needed.

I am going to treat this Instructable as a blog and post regular updates as I go through the build process. Please comment and make suggestions! The code and design files are all on the GitHub

Notice: I am migrating over to my own site: www.jamesfotherby.com

Step 1: 2nd March 2023 - Choosing What Changes to Make

Two aspects that worked well in V4:

  • The onboard STM32L475 - no flying wires.
  • The AMC1306 isolated ADCs measured currents and voltages beautifully

There are a couple aspects I'd like to reconsider:

  • Although the GaN MASTERGANs offer futuristic switching efficiencies, they are tricky to heatsink, they need a separate isolation barrier and they are harder to solder onto the PCB. I think I stand more chance of success using isolated gate drivers and TO-220 style MOSFETs.
  • I think there should be more DC Bus capacitance onboard the PCB. I have never seen an inverter where the bulk capacitance is separate from the main PCB.

I plan to make only a few alterations to the PCB. I have just had a look into the variety of isolated gate drivers out there. Seems like all the big manufacturers (TI, Infineon, Analog Devices, ST) do their own versions. TI have some tools to help compare the various chips and I found some good articles:

Following my research, I shall use the UCC21520ADWR which is currently in stock with DigiKey. I'm quite fond of the the MOSFETs I used in V3 - the 600V 0.094ohm STF35N60DM2.

I'll get to work making the necessary changes to the PCB next.

Step 2: 27th March - Schematic, PCB Routing and Assembly Finished

I tweaked the schematic to use through hole MOSFETs with isolated gate drivers. Here as some of the other changes:

  • The gate drive needs 12V so one of the mini-transformers is now a 5-12V rather than all 3 being 5-5V
  • The through hole MOSFETs mount underneath and are bent to lie against an aluminium heatsink
  • I have put a 220uF 450V electrolytic on the board - another 220uF can be on our DC Bus power supply
  • I have changed the filter a little bit - more discussed later - I'm using Tina TI to simulate this.
  • I had originally made a small error with the 2200pF EMI capacitors so I have corrected this
  • The choke is bigger and better. It's 2.2mH and can handle 6A.
  • I removed unnecessary resistors from the analogue front ends of the AMC1306s.

I hope that'll enable us to handle 1000W. Please find the attached schematic (Schematic_GTIv5.pdf)

The dimensions of the 4-layer PCB have not changed. PCBway manufactured the boards. I paid on the 16th, they were shipped in the 19th and they arrived on the 24th - absolutely incredible! They're good quality PCBs.

The assembly went smoothly. Took 3-4 hours to do the stencilling and part placement.

I powered up the board and it all worked as expected. I have promised myself not to proceed until I have bombproof overcurrent and overvoltage hardware cut-outs. I shall get the analogue watchdogs to disable the PWM signals by pulling the PWM_Disable line high in any erroneous situations!

Step 3: 29th March - Filter Design

The LCL filter has taken time for me to understand but I think I have it worked out now. It's job is to pass 50Hz content and reject all the high frequency PWM switching frequencies.

I have attached a picture of the filter schematic used in this inverter iteration (R2 represents the ~grid impedance). It involves:

  • Inverter side inductance, Li. Comprising 2 x 1.5mH inductors but you can think of it as single 3mH inductor
  • The grid side inductance Lg = 1mH
  • The filter capacitor, C = 2.2uF
  • The filter resistor R = 6.8R

Step 1 - choosing the values of Li, Lg, C. This is based on:

  1. 240V, 50Hz grid
  2. PWM switching frequency of 40kHz
  3. Filter ripple current of 20%
  4. A bus voltage of 400V
  5. Rated inverter power output of 1000W

I followed this 5 minute video tutorial (https://www.youtube.com/watch?v=ZNUqGBBlKLI).

1) C is chosen such that it absorbs 50Hz reactive power at 5% of the rated power of the inverter. The video shows the necessary calculations but this results in needing a 2.7uF capacitor. I settled on a 2.2uF capacitor since it was easier to obtain. We want to use a 250VAC rated film capacitor (since they have low dissipation factors and stable capacitance values)

2) Li is chosen to limit the 40kHz ripple current through Li and C. This ripple peak to peak should typically be limited to 20% of the rated current. The ripple current changes depending on the instantaneous voltage the inverter is having to output but is maximal at 50% duty cycle (ie. when the inverter is outputting 200V from a 400V bus). A 1000W 240V output requires a peak output current of 6A. Therefore we should limit our ripple current to 1.2A.

You can use the calculations in the video. I also played around with this online ripple calculator. With a Vbus = 400V, output Vo = 200V and 40kHz switching frequency you can see you need 2.1mH.

Inductors tend to loose their inductance with a DC bias applied. We need to choose our inductor such that it still has 2.1mH even with a DC bias current of 6A.

I chose to build the inductors using this core (FS-185090-2 from power magnetics). I used the Inductor Analyzer tool on the Micrometals website. This tool allows you to select the FS-185090-2 core and input the number of turns applied. I configured the tool for "AC inductor with ripple" and selected 2 series inductors in the "stack". With 102 turns on each core and 2 in series we get a 2.9mH inductor. However with 6A applied the tool tells us that our overall inductance will have decreased to 2mH. Excellent - that's about right.

3) Lg - The paper "Optimal design of LCL filter in grid-connected inverters" by Yong-Jung Kim, Hyosung Kim concludes "Through analysing frequency responses in LCL filters, the optimal inductance ratio is discovered that the inverter-side inductance should be three times as large as grid-side inductance" Based on this research I chose Lg = 1mH and I used the same inductor core. Winding the inductors is a bit tedious (or therapeutic depending on what mood you're in). I put 91 turns around the core and got an inductance of 1.08mH. This will be 800uH at 6A. I'm using 21AWG wire which is a little on the thin side. The resistance of this inductor was 200mOhm.

Overall our inverter has approximately 1Ohm of resistance amongst the 3 inductors, the PCB traces and the MOSFETs. At 4A RMS we can expect at least 16W of heat dissipation.

Step 2 - Ensure that the filter resonances are clear of any frequencies we shall be applying.

I simulated the LCL filter network on Tina. The grid presents an approximate impedance of 250-500mOhm at a socket outlet. Tina plotted the filter attenuation for us and shows a damped resonance at 3.8kHz. I experimented with different filter resistors and 6.8ohms seems to give us a good enough amount of damping.

Step 4: 30th March - Just Realised I Need a TVS!

If the output is suddenly disconnected under load (or the fuse blows) the grid side inductor (Lg aka L4) will generate a voltage spike.

Lg could have 6A flowing through it. A 1mH inductor with 6A flowing contains 18mJ of energy. This has to go somewhere. At the moment the energy can only go into C22, C27, C28 (The three 2200pF EMI capacitors). 18mJ into a 3300pF capacitor will charge it to 3300 Volts! That's going to cause some serious damage!

We need a transient voltage suppressor to clamp this voltage to below ~600V and dissipate this energy. I will get one.

It's also important to consider what'd happed if the relays were to open under load. They never should since any fault condition will disable the MOSFETs significantly quicker than the relays could ever open. If they open under load then a voltage transient could occur between the output and DC Bus. This could cause some arcing between the relay contacts. I don't think the issue is as significant as the former one because of the isolated nature of the AMC1306s.

Step 5: Successfully Got Overcurrent/voltage Protection Working

I have been trying to use the DFSDM analogue watchdog to trigger an interrupt if an overcurrent/voltage situation arises. I had been failing to configure the peripheral DFSDM registers for months! I gave up in v4 (possibly why it exploded). I have realised over current and voltage protection is essentially mandatory in grid tie inverters. But I cracked the code a few days ago with the help of ChatGTP.

We now have the DFSDM analogue watchdog checking the gird current (Ig) and the bus voltage (Vbus). The watchdog uses a sinc3 filter with an oversampling ratio of 16. To determine the sample rate we need to consider a few factors:

  1. Oversampling Ratio: The oversampling ratio is the ratio of the sampling rate at the input to the sampling rate at the output of the filter. In this case, the oversampling ratio is 16.
  2. Input Data Rate: The input data rate is the rate at which the bits are being sampled into the sigma-delta modulator. In this case, the input data rate is 10MHz.
  3. Filter Order: The order of the filter determines the number of taps required to implement the filter. In this case, the sinc3 filter has a filter order of 3.
  4. Resolution: The resolution of the output data is determined by the number of bits used to represent the output values.

Using the oversampling ratio and the filter order, we can calculate the output data rate as follows:

Output Data Rate = Input Data Rate / Oversampling Ratio * (Filter Order + 1)

Output Data Rate = 10MHz / 16 * (3 + 1)

Output Data Rate = 156.25kHz

I need to test how quick the AWD can catch overcurrent situations in practice - TBC

Step 6: 100W Grid Tie Using a 25V Transformer

Here we can see the bus voltage when outputting 3.4A RMS (Red trace @4A/V). The blue trace is our (AC coupled) DC bus voltage (@50V/V). So we're getting 1V peak-peak 100Hz ripple (with a total of 2200uF bus capacitance). You can see the high frequency 40kHz switching ripple too which is 500mV peak to peak. Next:

  • Would be interesting to see the amplitude of the 100Hz ripple for different bus capacitances
  • This is a lot of ripple! Would be nice to supress it somehow. We need to build our DC Bus supply.

TBC

Step 7: 13th April - 230V Output, No Transformer But No Grid Tie

I have thoroughly tested the overcurrent and overvoltage cut-outs. These now work flawlessly. The DFSDM analogue watchdog measures the gird current and bus voltage at 156kHz using a sinc3 filter. These filters have very fast transient response times (within 3 samples for a step change). This means within 20us we can respond to an overcurrent situation. This is about fast enough when you appreciate that 400V across a 5mH inductor causes a current rise of 80A/ms. In 20us the current could changed by 1.6A.

Now that over-IV protection is in place, experimenting with higher voltages and various control algorithms is far less stressful. Nothing bad should happen! (I can't believe version 4 lasted as long as it did with an over-IV system having a 1ms response time!)

Yesterday I increased the bus voltage to 400V and output a 230V sinewave into a 200ohm load. The inverter handled 260W comfortably. I got the PR controller regulating the current so that it was independent of bus voltage.

I next connected the grid to the inverter. The PLL works flawlessly (It always has tbh). I tried many different parameters for the PR controller but I just couldn't get the inverter to engage with the grid. The H-Bridge would enage at a zero crossing point and the PWM would commence but then a ~1.1kHz oscillation grew until after a few milliseconds the over-IV would trip out. I'm sure this is something I can address but I had no luck after several hours.

Unfortunately I have an exam on 17th May - The MRCEM primary - So I need to put this project to bed for the next 5 weeks whilst I revise. I look forward to returning. Let's summarise where we are:

  1. We have a voltage source inverter that can take a 400V bus and comfortably generate a 240V waveform
  2. All of our voltage and current measurements appear accurate with good SNR
  3. We have over-IV protection that operates within 20us to protect against any damaging conditions
  4. We are connected directly to the grid now
  5. Our PLL works flawlessly so we know the exact phase and frequency of the grid 50Hz fundamental

And what's not yet working:

  1. Our current controller is not working yet. Some sort of oscillation occurs on engagement with the grid

Step 8: 23rd June - 600W, No Transformer, Clean Waveform

I am migrating over to my own site so if you interested in the rest of this project then please visit