Logic circuit to generate and convert 3 bits parallel binary code into series for subsequent transmission ?

A project I am working on has 6 water sensors placed at different altitudes inside a tank.I've developed a circuit to assign 3 bit binary codes to each of the sensor and then transmit it wirelessly.I've attached the truth table and the binary functions that yield the desired output, as a picture.Please refer to it and check if it looks alright to you.Keep in mind that the sensors output '0' (ground) when idle and '1' (Positive) when active.  Also, the sensors are so placed that sensor 2 won't get activated unless sensor 1 is activated ,sensor 3 unless sensor 2 is activated and so on..I.e,when the sixth (last) sensor is activated ,all the other sensors would be active too.So,the truth table contains just the possible combinations.
A,B,C,D,E and F are the sensors(bottom to top)
X,Y and Z will be fed into a binary encoder ic,whose output will be transmitted.

Surfing the web,I realised that logical high and low can also be set using pull up and pull down resistors .I would appreciate it if someone could enlighten me on how this is done.(Explaining with reference to my circuit will be the best way)

Picture of Logic circuit to generate and convert 3 bits parallel binary code into series for subsequent transmission ?
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What you need is a "10 to 4 line priority encoder", IIRC, the 74HC147 or the 4000 series CMOS (assuming we're still working on the same project) 40147

Adarsh_tronix (author)  steveastrouk2 years ago

I can't express my gratitude to you! If it weren't for your timely help,I would have ended up spending a lot more on unnecessary logic gates.I've also picked up a lot of information while exploring about the priority encoder that you suggested.

But since I have just 8 codes that need to be converted to BCD,I feel that an 8 to 3 line priority encoder (CD4532) would suffice(Truth table attached).The BCDs will be further encoded by the HT12E into a single data output,before transmission.So far so good?


Yes, an 8:3 is fine, but some spares in hand wouldn't go amiss, you never know.

Adarsh_tronix (author)  steveastrouk2 years ago

Duly noted.I think I'll have to go with 10:4 anyway because they seem more common and hence available, than 8:3.

Adarsh_tronix (author)  steveastrouk2 years ago

Yes,it's the same project.I was busy with a few other things and couldn't focus on it until now.

I am trying to figure out what this "10 to 4 line priority encoder" actually does from its data sheet .But it would be really helpful if you could get me started.

Look at the datasheet truthtable - you'll see its very nearly what you drew, only the inputs are inverted.


iceng2 years ago

Let us look at an open collector NPN transistor.

The NPN is a Current amplifier - a small Base to Emitter current controls a LARGE Collector to Emitter Current.

With the collector open there is no Collector-Emitter current.

Then adding a Pull Up resistor there can be a Large Collector-Emitter current Flow.

Adarsh_tronix (author)  iceng2 years ago

Still a bit confused.If the small emitter -base current is what control the large collector -emitter current ,shouldn't the input be at the base (but marked out in your diagram) and the output somewhere between VCC and the collector?

And I've seen Pull up and Pull down resistors mostly with CMOS gates.Since MOSFETS are voltage controlled devices unlike their transistor counterparts,I have always presumed that the resistors got something to do with the voltage rather than the current.

A resistor with a voltage across its two leads has to have a current flow through itself.

A resistor with current flow has to have a voltage across its two leads.

Adarsh_tronix (author)  iceng2 years ago

Aha! The resistor part sounds pretty much like Ohm's law.Base-emitter and collector-emitter currents make sense now and I think I've got a fair picture of the concept.Thank you very much!

iceng iceng2 years ago

Say base-emitter current because current flows into the base and out of the emitter !