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VLSI testing ?

I am looking some information for Vlsi testing
what is Design for testability
what is Built-in self test

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vead (author)  steveastrouk2 years ago

Ok I am reading but I have some doubt

can someone help to understand this topics

scan is techniques used in design for testing

Q1 . how does vlsi circuit scan

I mean we need software tool or test equipment to scan VLSI circuit ?



Q2 when does we scan circuit after fabrication or before fabrication ?

You need VLSI scanning hardware, often via the JTAG port to do it. You scan AFTER fabrication - else what are you testing ?

vead (author)  steveastrouk2 years ago

ok tanks for help


design for testability is process ensure that design has enough
observability and controllability to provide for complete and efficient
test





built in self test - capability of circuit to test itself



built in self test circuitry incorporated within chip for self testing



test vector ---> original circuit & self test circuitry --> output response



scan design - scan is technique used in design for testing



test vector ---> original circuit & scan circuitry --> output response



Q- how does test vector generate for built in self and scan design



I think for scan we use ATPG to generate tset vector

does we use ATPG for built in self test



Q how does design make testable ?



I think we add some flip flop and mux to make testable design



Q can someone little bit how does circuit make controllable and observable?

You need VLSI scanning hardware, often via the JTAG port to do it. You scan AFTER fabrication - else what are you testing ?

You need VLSI scanning hardware, often via the JTAG port to do it. You scan AFTER fabrication - else what are you testing ?

vead (author) 2 years ago


Fault may occur anytime

- Design

- Process

- Package



circuit design

functional design

structural design

layout design



when we design circuit on software , error can be determine by the simulation



vlsi circuit contain additional test circuit like fault modeling

stuck at faults

Bridging faults

Transistor stuck-open faults

Delay faults



error can be determine by fault simulation



we can test circuit to determine fault

Q1 what is test generation ?



Q2 scan is technique used in design for testing ?



Q3 built in self test



built in self test method that allow circuit to test their own operation

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rickharris2 years ago

Oddly, I would think both terms are self explanatory.

http://en.wikipedia.org/wiki/Design_for_testing

http://www.google.co.uk/url?sa=t&rct=j&q=&esrc=s&s...

Testing any system is invariably a test against the original design specification.

The simple question is does the item do what it is supposed to do. The hard part is having a sufficiently detailed document that actually defines what the item is supposed to do.

Of course with electronic systems it may be necessary to place boundaries around a system element so that external factors do not expand the test field until it gets out of hand.

In general the majority of systems and sub systems are often tested in terms of their inputs and the corresponding outputs. With numerous inputs the testing for combinational problems can quickly get out of hand - this is a case for breaking the system into even smaller sub systems.

In an ideal situation every sub system should have a single function so that its operation can be easily confirmed and multiplex interactions are avoided.

It can be much easier to see where the combinational error is if you are confident in the operation of the individual parts.

I might note that with software this simple procedure is rarely followed. Hence software development tends to be late, none of limited functionality or well over budget, or indeed a combination of all 3.