Fig 1 shows the pin connections to the 555 timer, it was take directly from the 555 timer datasheet
. The power connections to the chip are through pins 1 (ground) and 8 (+Vcc). The positive supply voltage (+Vcc) should be between 5 and 15V.
The second image is a close up of the diagram depicting the internal functional components of the chip. This consists of a few different elements: resistors, transistors, comparators, a flip flop, and an output stage.
All three resistors diagrammed in fig 2 are 5kOhm (see image notes in fig 3). The purpose of these resistors is to set up a voltage divider
between Vcc and ground. Since all resistors are the same value we know that the voltage at the junction between the resistors are 2/3Vcc and 1/3Vcc (see image notes in fig 2). These voltages are used as reference voltages for the comparators.
is a circuit which compares an input with a reference voltage and outputs a LOW or HIGH signal based on whether the input is a higher or lower voltage than the reference. The 555 timer uses several transistors to construct its comparators (see the image notes in fig 3), so in the simplified functional diagram in fig 2 they are represented by boxes labelled "comparator." The comparator connected to pin 2 compares the "trigger" input to a reference voltage of 1/3Vcc and the comparator connected in pin 6 compares the "threshold" input to a reference voltage of 2/3Vcc from the voltage divider.
A flip flop
is circuit that switches between two stable states based on the state of its inputs. The 555 flip flop outputs a high or low based on the states of the two comparators. When the trigger comparator is outputting a low signal (regardless of the state of the threshold comparator), the flip flop switches high, when both comparators are outputting a high signal, the flip flop switches low. The timing of a high pulse output from the flip flop can also be manually reset (the beginning of a pulse can be triggered) by pulsing the reset pin low.
The functional diagram in fig 2 also includes two transistors. The transistor attached to pin 7 is an NPN transistor
. Since pin 7 is connected to the collector pin of the NPN transistor, this type of configuration is called open collector
or open drain. This pin is usually connected to a capacitor and is used to discharge the capacitor each time the output pin goes low. The transistor attached to pin 4 is a PNP transistor
. The purpose of this transistor is to buffer the reset pin, so the 555 does not source current from this pin and cause it to sag in voltage.
The output stage of the 555 timer is indicated in the image notes of fig 3. Its purpose is to act as a buffer between the 555 timer and any loads that may be attached to its output pin. The output stage supplies current to the output pin so that the other functional component of the 555 timer don't have to.