Step 2Talking to shift registers and LEDs
There's a good tutorial on shift registers on the arduino website.
The LEDs are driven by 8-bit shift registers of the type 74HC595. Each port can source or sink about 25mA of current. The total current per chip sinked or sourced should not exceed 70mA. These chips are extremely cheap, so don't pay more than about 40cents per piece. As LEDs have an exponential current/voltage characteristic, there need to be current limiting resistors.
Using Ohm's law:
R = ( V - Vf ) / I
R = limiting resistor, V = 5V, Vf = LED's forward voltage, I = desired current
Red LEDs have a forward voltage of about 1.8V, blue and green range from 2.5V to 3.5V. Use a simple multimeter to determine that.
For proper color reproduction one should take a few things into account: spectral sensitivity of the human eye (red/blue: bad, green: good), efficiency of the LED at a certain wavelength and current. In practice one simply takes 3 potentiometers and adjusts them until the LED shows proper white light. Of course the maximum LED current must not be exceeded. What's also important here is that the shift register driving the rows must supply current to 3x8 LEDs, so better not push the current up too high. I was successful with limiting resistors of 270Ohm for all LEDs, but that depends on the make of the LED matrix of course.
The shift registers are interfaced with SPI serial. SPI = Serial Peripheral Interface ( Image (1) ).
Opposed to the serial ports on PCs (asynchronous, no clock signal), SPI needs a clock line (SRCLK). Then there's a signal line telling the device when the data is valid (chip select / latch / RCLK). Finally there are two data lines, one is called MOSI (master out slave in), the other one is called MISO (master in slave out). SPI is used to interface integrated circuits, just like I2C. This project needs MOSI, SRCLK and RCLK. Additionally the enable line (G) is used as well.
An SPI cycle is started by pulling the RCLK line to LOW ( Image (2) ). The MCU sends its data on the MOSI line. The logical state of it is sampled by the shift register at the rising edge of the SRCLK line. The cycle is terminated by pulling the RCLK line back to HIGH. Now the data is available at the outputs.
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