I put this instructable together after noticing that there really isn’t anything on the website about programmable logic except for one question and one instructable about a programmer (see links below).
So in an effort to try to help everyone understand what a programmable logic device is and as a
means of posting my first instructable here you are.
Remove these ads by
Signing UpStep 1: Types of Programmable Logic Devices.
For those that noticed, I mentioned two types of parts, a PLD (and variants) and FPGA. What are the differences? The short answer is architecture. The FPGAs generally have lots of Flip Flops while PLDs have much fewer if any at all.
In addition today’s FPGAs usually get other features such as built in multipliers, dedicated block ram, and can generally handle more interface standards (such as LVDS). Most FPGA devices need a separate device to program them (the exception to this is Actel and the Spartan 3AN series from Xilinx). This is due to the fact that most FPGAs are SRAM based devices and when power goes out, the program is lost. The FPGA architecture is structured similar to the pictures below:







































Visit Our Store »
Go Pro Today »




I work with devices from PLX specifically their OXPCIe952, 954, and 958 devices. Xilinx also has a hard coded solution in their Spartan 6 line but compared to the PLX solution its expensive so it generally only gets used in really high end systems.
Check those out especially the PLX products. They have a lot good resources available.
http://www.componentsdirect.com
http://www.componentsdirect.com/programmable-logic-devices.html
Fun times.
Several years ago, my former high-energy physics experiment (BaBar) completed an upgrade of some of our front-end electronics to use Spartan 3 FPGAs. We were able to move all the data processing (waveform feature extraction) that had been programmed in C++ on a rack of Motorola PPC boards, down to FPGAs mounted directly on the detector. We reduced the data volume by a factor of 5 (32 bytes per channel down to 6), and the maximum trigger rate from ~2.2 kHz to well over 10 kHz (with zero deadtime).
I didnt include the micro controllers in this instructable for a couple of reasons; The website already has quite a bit of material on them and I wanted to focus on the digital logic side of things and not so much on the embedded side where you would see micro controllers used.
I do plan on doing a future instructable that talks about using a micro controller core (i.e. IP) such as the PicoBlaze or MicroBlaze micro controller cores from Xilinx.
Thanks again!