Introduction: A PWM Dimmer Revisited
This project revisits one of the (inspirational) earlier projects of dyi_bloke: the "AC PWM Dimmer for Arduino". There were a number of things in the original design that I wanted to understand in detail and a couple of things I thought are worth trying to improve.
The things of which I wanted to dig into their details are related to the latency/response times, something on the line of "how far can I go in increasing the PWM frequency until the things won't go as expected anymore?"
The things I thought worth trying to improve:
- the big, hundreds of volts, capacitor - I'll let aside the price for it, but that's such a waste of PCB/box space;
- the fact that the PWM logic is "polarity inverted" - when the input of the optocoupler is on, the load goes disconnected and viceversa
Additionally, I threw a challenge in front of me. Some year-and-something ago, quite a beginner in electronics (not that I'm hugely more advanced now), I bought a handful of FDP46N30 MOSFETS to use on projects dealing with main power. At the time, I forgot that the main AC 220-240V is RMS voltage, and not the maximum voltage, so I ended with that handful of MOSFETs with a maximum Vds=300V. As a "lest I forget" lesson for myself and to quench the regret of spending $20 for 50 NMOS-es only to decorate the inside of a drawer seldom opened, I challenged myself in using them instead of buying some other more appropriatelly rated MOSFETs - if I'd succeed in doing it (I have), I'll theoretically be able to switch up to 46Amps - man, that's like 10kW of power to control with PWM ;) !
Now, the warning: with great power (and high enough voltage, like the one in mains) comes great responsibility! This project uses deadly voltages, if you decide to do it, it will be your responsibility to take the necessary precautions - I'll take no responsibility whatsoever for your actions in implementing it. Even more, I am NOT a qualified electrical engineer, thus I offer no warranties for the design or the fitness of this design to your purposes.
If you decide to go ahead, my advice: do NOT use a breadboard for the power side of the circuit - the connection wires won't carry more than some (small number of) hundred milliamps before overheating and melting - possibly in an explosive way, sending melted copper drops (at 2000C) around, maybe in your inquisitive eyes. More than that, they have the nasty habit of getting loose and out of the breadboard holes when you expect the least - if those hundred of milliamps goes through your limbs, in the best case scenario, prepare for one of the most ouch-inspiring shocks of your life. If they go through your heart, chances are you'll not going to finish the project or any other project for the matter.
Seriously, guys, either take the due care or don't do it at all. Stay safe.
Step 1: The Single MOSFET Variant
I haven't made this one, but I'm confident it will work as intended if you use an appropriately rated NMOS (e.g. IRF730 for 220-240AC) for switching. I'm using this one as a simple enough case to explore how does it work before jumping into the design using two MOSFETs in series to switch a higher voltage than the Vds(max) of a single MOSFET.
So how does this one work?
1. the D1, R1-R5, C1 and D2 group functions as a 15V source able to deliver a 3.5 mA current on average.
Why 5 resistors in parallel? First of all: use metallic film resistors rated at 0.5W (instead of carbon film ones, rated at 0.25W). And here's why: 240V AC (RMS) will have a maximum value voltage of 330V (or close to that value). At the max, each of the 5 resistor will deliver 1mA - leading to a 0.33W as maximum power each of them needs to sustain. If you later decide to add to the circuit some filtering capacitors downwards the rectifier bridge, you may work mostly with the maximum voltage, so it makes sense to put a safety factor. If you let it without filtering capacitors, well, 5mA at peak translate into 3.53mA as RMS - the average.
In any case, if you feel like reducing the number of resistors or using other series/parallel combinations, be my guest - just make sure:
- the average (RMS) current supplied through the combination of resistors is 3.5mA or (marginally) better
- the power rating of all resistors that you use must be higher than the power they'll support while inside the circuit
The same goes for switching other voltages, like the (copper hungry) 110V/120V in other parts of this world.
The C1 will buffer the current and is protected by the D1 against discharge when the rectified voltage goes close to zero. Together with the D2 Zener, the group should be able to keep a constant 15V and deliver currents well over 3.5mA for brief moment (microseconds) without dropping the voltage too much.
C1 needs to be rated at 24V and the 15V Zener at least 0.25W or better.
2. the 4N35 and R7, R8 make up the galvanic decoupler - its role is to isolate the high voltage switching circuit (the presented one) from the PWM control circuit.
Now, I promise that I'll cover the "magic" value of the R7, R8 resistors later - perhaps into another 'ible, but for now I got some things to say:
the way R8 is connected makes it a Common Collector configuration for the output phototransistor. This is what leads the "positive PWM-ing": when the input is low, the output transistor is non-conductive and the MOSFET's gate is pulled to the ground by R8, thus non-conductive as well; when the input switches to high, the output transistor opens up and connects the MOSFET's gate to the 15V "rail", your load will feel the current.
Now, the price to pay for "connecting" the MOSFET gate to 15V is the current flowing (lost) through the optocoupler's output transistor and R8 into the ground. It is 15V/5600ohm=2.5mA drained from the source - this is why the 15V "source" needs to deliver over 2.5 mA - if it would be under this value, in cases when the duty cycle of the PWM is 1 (always on), the "source" won't be able to maintain the 15V output.
- the value for R7 - the resistor in the optocoupler's input is chosen for a PWM amplitude of 5V.
If you use other PWM voltages, do use a value which will cause the same current - e.g for a 3.3V PWM, use a 220R resistor.
do not feed into the optocoupler PWM with pulses shorter than 10 usec (that's 10 microseconds) with high frequency. Doing so will cause the switching MOSFET to work into resistive mode, with all the heat that ensues. If the PWM frequency is low enough, the MOSFET will get enough time to cool even when the duty cycle is small; otherwise, it will let out the magic smoke sooner than you would like.
- in regards with the point above - keep in mind that the common optocouplers are in general quuuiiitte slooow to react. For example, take a look (and understand the implications) of the circuit and diagrams on page 5 of the 4n35 datasheet - if the best switch on/off response of the optocoupler is 10usec, then this value will define your shortest pulse that will see your optocoupler conducting. So with 20 usec per bit (10 to open, 10 to close) - when you do a digital PWM with 256 pulse-width per cycle, it makes a 5.12 msec (milliseconds!) per PWM cycle. That's like 200Hz PWM, right?
But that's a story I'll tell later - I promise to link the (future) 'ible here when I'm done telling it.
3. the Qs1 and Qs2 emitter follower push pull (totem pole) current amplifier between the optocoupler/R8 and the MOSFET's gate is meant to speed-up the draining of the gate's capacitance on high-to-low transitions (ask me in the comments if you don't know how this amplifier configuration work, I'll add some notes at the end of the 'ible)
Now, if the MOSFET's input capacitance is in the 400-800 pF (and if you use 4N35, which is rather slow) you may do without this amplifier; and IRF730 is one of them (with an input capacitance of 700pF - see page 2 of the datasheet). But there are MOSFETs with quite high input capacitance and FDP46N30 is one of them (and you can use one if your mains run at 110-120V AC) - its maximum input capacitance is 3380pF.
So what would happen if we connect the output from optocoupler directly to the MOSFET's gate in cases of high input capacitance. Well:
- the low-high transition is mostly unaffected - the charge flows from C1 through the output transistor of the optocoupler, which I'll assume will show a low resistance (the input of the optocoupler sees a 15mA current, the typical current transfer ratio of 4n35 is 100%, so the output transistor should be able to supply 15mA. And we are "draining" through R8 only 2.5mA, so plenty of spare conductivity to use in loading the MOSFET's gate);
- the high-low transitions is however interesting - suppose the output transistor closes suddenly; the charge of the MOSFET's gate will drain into ground through R8. We know that a typical power MOSFET will stop conducting on a Vgs(th) of around 5V (maybe lower, but let's take the optimistic case).
So, how long will take a capacitance of 3300pF to discharge from 15V to 5V through a 4700 resistor? Well, that's about 17usecs. Add this to the lag caused by the non-ideal switch-off time of the optocoupler to understand why the presence of the current amplifier is almost mandatory for cases of high MOSFET input capacitance.
4. The Q3 switching MOSFET (and the rectifier bridge) - first thing, look up their current rating, take so that the maximal current you need is at most 70% of their maximum rating (or less; that is, put in a higher safety margin). Look up in the datasheets the de-rating of max current with the temperature and think how well your circuit would behave if the ambient temperature is 45C instead of 20C; and what happens if the components are heating quicker than you expect.
The same goes for their maximum voltage rating - it too should have a safety margin of extra 30%, except that the rectifier bridges are usually rated for an AC voltage while the maximum voltage for a MOSFET - Vds(max) - is always for DC; remember this and have a refresher on the RMS (Vpeak = Vac * √2) - if you forget this, you will need to read the second step of this 'ible.
Another point concerning the timing and PWM switching frequency - the 4N35 optocoupler is already slow enough, but do lookup the datasheet of your MOSFET of choice for the "Turn-On Rise Time" and "Turn-Off Fall time" - if they are slower than even the optocoupler (gosh, what MOSFET did you choose?) then the MOSFET is the bottleneck that will limit your switching frequency.
5. PCB and component cooling - a bit more about the maximum current your power side of the circuit is going to serve: let me warn you that the PCB traces may need to be wider than you may think - use an online calculator for the trace width of your power traces. If you make the circuit on a pre-perforated prototype board, use thick wire to connect the power circuit.
Also, when designing your PCB, let enough space around the MOSFET and the rectifier bridge to mount radiators if it turns out they are needed.
If you plan to use the dimmer with devices over 500W, the cooling solutions are going to be needed, possibly at even lower level of power but do experiment (with due care paid to deadly voltages).
Step 2: Switching With Two MOSFETs in Series
I tempted to start a "do the best you can with what you have" 'ible series, with this project being the first. I wanted to make a dimmer based on the original design, only to realize that I have no power MOSFETs able to support the maximum 325-330V a rectified main will provide. But I had some FDP46N30 able to go up to 300V (and 46A max). Now, price-wise, getting some appropriate MOSFETs would not have ruined me, but I hate waiting weeks for parcel delivery and I also hate wastage (and this includes paying 3-5 times more for courier delivery than for the components and the idea of a 3-tonnes van burning diesel for kilometres to deliver 50g worth of components in my mailbox).
And so, the challenge: could I find a solution to use two (or more) lower voltage rated MOSFETs to switch a higher voltage? Yes, it is possible - and that's quite easy. It's a variant of the cascode amplifier, simplified for switching purposes.
How does it work? Have a look on the Q3/Q4 stack of MOSFETs - the Q3 gate will receive its gate control from the PWM galvanic isolation complex, but how the Q4 is controlled?
So let's start with the assumption that upper voltage of the stack is DC and has the value at the peak of the rectified DC (this is what the C1+C2 capacitors after the rectifier will do).
The starting state
Assume the input on the Q3's gate is low and thus non conductive (the switch is off). The voltage at Q4's gate will be half of the max voltage, while the Q4's source voltage:
- cannot be lower down than its gate by more than Vgs(ths) - would it be any lower, the Q4 will start conducting and let some charge flow into its source until the voltage grows back to stop it from conducting
- cannot be higher than its gate by more that a diode-drop (0.65-0.7V) - would it be any higher, the D4 diode will drain the extra charge.
BTW, this mechanism also takes care of a mismatch in the Idss - zero-gate-voltage drain (leakage) current - for FDP46N30, this is maximum 10uA at 125C, but since the output capacitance is as small as 500pF, without a balancing mechanism, a mismatch in the leakage current between the two MOSFETs will result in having the one with lower leakage charging until the Vds builds up to over the maximum rating. Specifically:
- if Q4 is leaking less than Q3, Q4 source would leak charge through Q3 until the Q4 source voltage would be close enough to zero to blow Q4. However, because the Q4's gate is clamped by the R9/R10 voltage divisor, the moment the Q4's source drops only a bit lower than the threshold voltage, the Q4 will open just enough to compensate for the lower leakage - in other words, Q4 will leak a bit more, to match the leakage of Q3
- if Q4 leaks more than Q3, the charge on Q4's source would build up (Q3 doesn't drain it fast enough). As a consequence, Q3 would feel an increase on its drain-to-source voltage until it will go over the maximum rated and Q3 will blow. But the presence of D4 will act as a path to drain the excess of charge through R10, so even if Q4 leaks more, the leak won't cause a... ummm... disastrous pooling of charge.
In conclusion, when there's no input (a zero voltage on Q3's gate), both Q3 and Q4 are non-conducting and Q4's source voltage is approximately half the voltage on the ends of the Q3/Q4 stack - give a diode-drop or take a Vgs(th) - which mean that the MOSFETs will feel a voltage of about 160-170V, well inside the safe operating area.
The low-high input transition
Assume that the input on Q3's gate goes high - the galvanic isolation complex will apply a step voltage of +15V.
If Q3 would be ideal, it will open instantly, letting Q4 taking the brunt of the full 330V and blowing it up. But nothing in electronics happens instantly and both Q3 and Q4 has similar "reaction times".
So, Q3's drain voltage (same as Q4's source voltage) starts to go down, until the voltage difference between Q4's gate and its source is large enough for the Q4 to start conducting itself. The result is the same current will flow through the load and both of the MOSFETs. It may seem that the voltage on Q4's gate, as established by the R9/R10 voltage divider, will lag behind until Q4's Vgs will go over the maximum +20V rated. This is where the D4 Zener offers protection - the moment Q4's Vgs goes over 15V, the Zener starts conducting and diverts the current from R10 and into the more-conducting Q3.
The process goes until both Q3 and Q4 are at their peak conductivity, both showing a resistance of about 0.08R and with all the voltage drop on the power side of the circuit being caused by the load.
The high-low input transition
So, both of Q3 and Q4 are conducting, Q3 because it has +15V applied by the input and Q4 because the gate voltage is maintained by the flow of current through R9, D4 and Q3.
What happens when the input is switched off? Q3 start to become less conductive, opening up the power circuit. If Q4 would remain fully conductive, Q3 would reach a stage in which it supports the entire power voltage (and let its magic smoke go). But, as Q3 becomes less conductive:
- Q3 drain (common with Q4 source) starts to have a higher voltage, so any excess of charge (let through by a more conductive Q4) will start to flow through D4 - now polarized directly - increasing the Q4 gate voltage, and as such will force Q4 to close as well
- the less current Q3 let pass (equivalent with an increase of resistivity), the more current R10 will take, reestablishing R9/R10 as a voltage divider
At the end, both the Q3 and Q4 are non-conductive and the voltage drop across any of them is about half of the power voltage.
- you told us that one of the possible improvements you chased is getting rid of the big filtering capacitor after the rectifier. And now you are assuming the power is DC. What's the deal, mate?
Well, if you get out the filtering capacitors, then:
- if Q3 is conductive, without any help, Q4 may not have enough voltage on its gate to stay conductive when the power voltage goes to zero. See? the Q4 gate would be only maintained at 15V through R9. Fortunately, D3 - a fast switching diode - is there to help. The moment the voltage on the Q4's gate goes below 15V because the mains voltage goes to zero, the Cs1 capacitor (acting as a 15V source) will take... ummm.... charge of the situation and keep Q4 opened;
- and if Q3 is non-conductive and the mains voltage goes towards zero, won't Q4 still be conductive? Well, yes, but what's the problem? The power circuit is still maintained opened (no current) by a non-conductive Q3 and the voltage Q3 is required to support is, well, towards 0.
One on top of the other, it is safe to work without filtering capacitors at the exit of the rectifier, D3 takes care of it
- what's the fuss with C1, the one in parallel with R10?
Well, its sorta snubber, to mellow a bit the transitions low-high and high-low on Q4's gate. But... to be absolutely sincere, beat me if I know how it does work or if the value for it is sufficient or excessive. If you know better, do tell me.
Step 3: 't Works
In front, an adjustable PWM using an Arduino Mini and 3 trim-pots, 2 for the duration of the duty cycle, one for the duty cycle itself - I'm adjusting the one controlling the duty cycle.
At the back, the PWM dimmer
On the right - an incandescent light bulb acting as a load.
We have a be nice policy.
Please be positive and constructive.