Introduction: DIY TACS: Hardware for Machine-human Telepathy Experiments

NOTE: THIS DEVICE IS EXPERIMENTAL HARDWARE AND IT OPERATES BY RUNNING A CURRENT THROUGH THE BRAIN OF THE USER. DO NOT USE THIS DEVICE UNTIL YOU READ CITATION 1 AND GO OVER THE PUBLISHED SAFETY LIMITS FOR TRANSCRANIAL ALTERNATING CURRENT STIMULATION! USE OF THIS DEVICE MAY RESULT IN PERMANENT NEUROLOGICAL DAMAGE, DISMEMBERMENT, IMMOLATION, DEATH, OR ANY COMBINATION THEREOF, IN ADDITION TO THE RISKS NOT SPECIFICALLY LISTED HERE.

Edit: A simplified version of this hardware is now available.

These are instructions for building a computer-controlled tACS device. Transcranial alternating current stimulation (tACS) is a form of neuronal stimulation that operates by running an alternating current through the human brain. This current can be any waveform from random noise (tRNS is the official research term if you want to be fancy about it) to a clean sine wave. There is some evidence that the brain's own oscillation pattern will synchronize with externally applied alternating current(1), and specific cortical oscillation patterns may be associated with specific thought processes(2). Since EEGs directly record cortical oscillation patterns, it seems reasonable to hypothesize that these recorded patterns could be superimposed on a second brain using tACS in order to affect mental processing, and perhaps even to induce mental synchrony. The hardware described here is being developed for an experiment we're assembling to begin preliminary testing of this hypothesis. Humans who want to play with this hardware but don't want to build it should sign up for participation.

This is a backbone technology for the formation of the collective of superhuman cyborgs necessary to save the world. The development of this technology and others like it seems practically inevitable at this point. It is preferable that technologies such as this one, that could so profoundly influence humanity, be developed and implemented in an open manner -- under the watchful guidance of the public at large -- rather than secretly, by military or intelligence agencies.

Citations

(1) Transcranial alternating current stimulation (tACS), Walter Paulus et al., Frontiers in human neuroscience, http://www.ncbi.nlm.nih.gov/pmc/articles/PMC369536...

(2) Spectral fingerprints of large-scale neuronal interactions, Markus Siegel at al., Nature reviews neuroscience, http://www.nature.com/nrn/journal/v13/n2/full/nrn3...

Step 1: System Overview

Since this device is to be attached to humans, safety is of utmost importance. For this reason, the electronics which are connected to the human are galvanically isolated from both the input power lines and the data input from the computer. In addition to electrical isolation, three redundant current limiting systems are used to ensure that the current through the human remains restricted to a safe level even in the event of multiple system failures.

As you can see from the block diagram above, the control signal for the device originates in a computer, which is connected to a USB to SPI converter. The converter sends an SPI signal to an isolated DAC, which converts the signal into an analog voltage. This analog voltage goes to a voltage to current converter, which supplies a regulated current to the human. The PSU powers all circuitry behind the isolation barrier. Let's look at each subsystem in more detail, from the human back.

Step 2: Voltage to Current Converter

The voltage to current converter has the dubious honor of being directly connected to the human. Extra care was taken in its design, as failure to appropriately limit the output current may cause undesired effects on the human (seizures, convulsions, immolation, death, et cetera). For this reason, most of the circuitry in the V to I converter is safety circuitry not strictly necessary for operation -- this additional circuitry slightly degrades normal performance by decreasing the voltage headroom available for output and increasing output equivalent series resistance.

A block diagram has been provided in the hopes of clarifying the following, the principle of operation of the voltage to current converter: When the variable current source is set to 1mA, it only takes 1/3 of the current supplied by the 3mA source and the resulting current through the human is +2mA (3mA-1mA), and when the variable current source is set to 5mA, it takes 5/3 of the current supplied by the 3mA source and the resulting current through the human is -2mA (3mA-5mA). Sweeping the variable current source from 1mA to 5mA proportionally sweeps the current through the human from +2mA to -2mA. The active limiters never become activated during normal operation, and the passive limiter drops no more than 14V unless a fault occurs.

The second image is the actual schematic of the voltage to current converter. The functional blocks have dashed lines around them. If this schematic doesn't make sense to you by itself, I've put more detailed descriptions of each functional block in the next step. Attentive readers will find that the "1 - 5mA" current source is actually capable of going all the way down to zero. The actual current output of the voltage to current converter circuit is bounded as follows: DAC out = 0V, current = +2.9mA; DAC out = 5V, current = -2.4mA; with a linear relationship between DAC output and current between those points. Software must be used to limit the values sent to the DAC so that the output remains bounded within the +/-2mA limits prescribed by the Gottingen protocols (which were originally written for tDCS, yes, I know). The reason the positive current output capacity has that extra mA will be explained in the next step.

Step 3: Voltage to Current Converter Subunits

Current limiting for normal operation is governed by simple one-transistor current regulators of the structure shown in the first two circuits. A voltage reference and a resistor are used to set the current, which will be roughly equal to (Vref - 0.65V) / R, as long as Vsupply has enough voltage to force the appropriate current through the load. This equation (approximately) applies for both NPN and PNP implementations, and is a rule of thumb only; it ignores base bias current and a whole bunch of other variables, but it should be accurate to within 5% most of the time. This type of current limiter begins to act in a nonlinear fashion if you allow the transistor to get too close to cut-off. (That's why the extra mA is in the positive supply fixed current source, so the negative supply variable current source never gets too close to cut-off.) The one-transistor current regulator works by maintaining a constant voltage across the resistor, thereby guaranteeing a constant current through the resistor.

The first backup layer of current limiting is provided by three-transistor discrete current limiters. These circuits are neat because they don't drop much voltage when they're not limiting current (under 2V), and they don't need any connections besides one input and one output. This circuit can only limit current flowing one direction, but you can use two of them in parallel (with one reversed) to limit alternating current if you want to. You can omit the diode if your application doesn't have a risk of current reversal. (The tACS shouldn't ever need this diode in its limiters, but I left them in for extra protection.) This three-transistor discrete current limiter limits the current to (0.65V) / (Rsense). The same "rule of thumb only" warning applies to this equation as the one in the paragraph above. Rbias needs to be small enough to saturate the darlington pair during normal operation, but large enough to allow only an insignificant percentage of the desired current limit through (through Rbias itself, that is). Here's how the limiter works: normally the darlington pair is saturated by current through Rbias (current flows freely). When the voltage across Rsense is big enough to turn on the transistor that's not in the darlington pair, that transistor begins turning off the darlington pair by removing its base current, keeping the voltage across Rsense limited to ~0.65V and thus limiting the current through Rsense, and through the circuit as a whole, assuming Rbias is big enough that the current through it can be ignored.

The bottom circuit in the second image is a subsection of the voltage-to-current converter sub-module, which contains an advanced current regulator sub-sub-module whose schematic is pictured here. This sub-sub-module limits current through it to (voltage across regulator) / (3*R). It utilizes three fixed-conductance sub-sub-sub-modules which were produced from hydrogen using the proton-proton chain fusion reaction process.

Step 4: Isolated DAC

The isolated DAC only has two main pieces, an ISO7241 digital isolator and an MCP4911 DAC. Truly shocking to find a digital isolator and a DAC in our isolated DAC submodule, indeed. The operation of this submodule is straightforward: !CS is pulled low to tell the DAC to expect data. The data are clocked in through the SPI bus, and !CS is set high to tell the DAC to adjust the analog output to the new value. (The ISO7241 just acts like a logic buffer.) The analog value the DAC produces goes to the voltage to current converter.

The red LED serves to drop the 5V from the USB port to about 3.3V, which is the output signal level of our USB to SPI converter. The ISO7241 can run from 3.3V or 5V on either side, but the supply voltage needs to be the same as the input signal level. The isolated DAC also has a 0.1uF ceramic capacitor between each of the chips' positive supply inputs and ground, omitted from the schematic shown above.

Step 5: Isolated PSU

The isolated PSU's first important job is to electrically isolate the output circuitry from the power line. This is done by the transformer. The PSU produces +60V, +0V, and -60V from the 22VAC out of the transformer with a voltage quadrupler circuit (described in more detail in the next step). The +58.25V and -55V rails are derived from the +60V and -60V rails using linear regulators.

"But why are two of your rails just raw supplies with as much as 5% ripple? Doesn't that cause ripple on your output?" asks the imaginary reader. Well, imaginary reader, you'll be pleased to find that because of the current regulator structure of the voltage to current converter, ripple on the +60V and -60V rails doesn't show up in the output (at all, as far as I can measure with my oscilloscope). What really matters in this application is that the +58.25V rail is 1.75V below the +60V rail, and that the -55V rail is 5V above the -60V rail. Those voltage differences are what control the current regulators, and so they need to be precise!

This supply uses discrete linear regulators that are simple, but they have some kinks, like slowly drifting in output voltage a bit as the device warms up. I'll be replacing them with precision integrated regulators in V1.0, but I didn't feel like waiting four days for shipping while I was working on the beta version, so I made regulators from parts on hand.

Step 6: Isolated PSU Subunits

Let's start with the voltage quadrupler. It's the circuit in the first picture, the one with all the diodes and capacitors. Look at D1 and C1. Imagine that the AC supply is at this moment the correct polarity to charge C1 through D1. Now, C1 is fully charged. The polarity of the AC supply switches. Now, C2 charges through D2, to double the AC supply's peak voltage, because C2 isn't just being charged by the AC supply, it's being charged by the AC supply in series with the already-charged C1. So double the AC supply's voltage is now across C2. The same principle works on C3 and C4, so C4 gets charged to double the AC supply's voltage as well, and since they're in series, the circuit outputs 4 times the AC supply's voltage. You can use this circuit after an h-bridge driven by a square wave if you need a simple dc-dc converter, but remember: the output and the input can't share a ground connection! (In my case there is no ground connection on the input since it's just a transformer.) This description ignores forward voltage drop of the diodes. In reality each diode burns 0.7V or so off the total output voltage.

Now we will discuss voltage references. In the second picture, the first two schematics are basic diode voltage references. Diodes drop a roughly constant voltage (0.65V +/- 0.05V most of the time), so you can use them to regulate voltage. The left reference outputs about 2V above ground, the right one outputs about 2V below whatever the supply voltage is.

If you need to regulate voltage, there are a few simple circuits here to use. Probably the easiest is the zener diode based series-pass regulator, the one on the bottom left. It outputs whatever the zener diode's voltage is, minus 0.65V.

My favorite linear regulator ciruit is the discrete active voltage regulator, on the bottom right. R1 tends to turn Q1 on, so the output voltage rises until the base of Q3 is high enough to turn on the darlington pair (Q2 and Q3 that is) and these suck away the base bias of Q1. The summary: This circuit makes sure the voltage across R3 is about 1.2V all the time, and you can adjust the values of R2 and R3 to change the output voltage. R1 needs to provide enough base bias to keep normal operating current flowing, but otherwise should be as large as possible. Vout = ((R2 + R3) / R3) * 1.2V

As always the equations and voltages given above are rules of thumb only and ignore a bunch of minor variables in the interest of brevity.

Step 7: USB to SPI Converter

For the beta prototype's USB to SPI converter, a UM232H-B was used. This part has 16ms latency, which is unacceptably high for the final version of the tACS device, but it's the first one I could get the signal through for testing the rest of the system. I'm going to replace it. I've been looking for off-the-shelf solutions, and I've tried the MCP2210 (Don't ever use that part. It's not reliable for me and others have problems with it too.), and looked into using V-USB firmware (outdated: doesn't compile right with current version of LIBUSB). I will be redesigning the USB to SPI converter to use an FT232RL followed by an ATMEGA328. Then the software can talk to the device without needing special driver installation, too. The excessive latency of this part is why I'm not publishing the driver software I've written so far, because the driver software will be completely rewritten for the final version, since I'm changing the USB to SPI hardware the computer communicates through.

Step 8: From Beta to V1.0

What next? There are only two hardware adjustments I must make before I can consider this device V1.0 instead of a beta version. I need to get rid of the power supply regulator drift, and I need to greatly decrease the latency (or at least increase the output sample rate) of the USB to SPI conversion hardware.

Regulator drift. In a nutshell, I noticed that this device's output current drifts up about 100uA from when it's turned on to when it's warmed up. The output current is based on the voltage reference and +VCC supplied to the DAC, which drifts from 5.15V at turn-on to 5.01V once warmed up. This change accounts for the output current drift I observed, and I can eliminate it by replacing the simple discrete-transistor regulator circuitry that provides the -55V output of the PSU with a high-precision integrated regulator. The three-diode voltage reference in the power supply that provides the +58.25V rail also drifts -- from dropping 1.79V at turn-on to dropping 1.76V once warmed up. Since I'm putting precision regulators in the power supply I may as well add one there too.

USB to SPI conversion hardware latency. The latency isn't strictly the problem here, but I need the time between samples to be smaller. 1ms at most, ideally. I believe the best solution is to send the output data points in blocks from the computer to an intermediate microcontroller, which will send each data point to the DAC one at a time.

I will, of course, update this instructable once these changes are implemented and tested. If you're the curious type you can examine the alpha hardware iteration before this. I will be continuing to work on the telepathy machine hardware and experiment design, and if the experiment sounds interesting to you, you should sign up for it.

Step 9: TM01 V1.0 Hardware and Firmware Complete

But don't hold your breath for drivers!

The hardware is done and tested, and it works. 1ms between samples now. I've included the final EAGLE board files for the PSU and analog output section. I've also included a copy of the github repository (written by my ally Paul) that enables the AVR to convert the UART signal to SPI and maintain a buffer. There is no board file for the digital parts. The digital signal chain is as follows:

[Computer] > [FT232RL] > [ATMEGA328@12MHz] > [ISO7241] > [MCP4911]

This signal chain can be easily constructed from off-the-shelf development boards.

However, after getting to this point, I've now come up with a MUCH simpler and cheaper way to get the signal from the computer to the tACS device. I'll link to the instructable for that once I'm done writing it up.

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