Picture of Designing a 4-Bit Adder in Quartus II

The purpose of these instructions is to create a 4-bit adder in Quartus II. A 4-bit Adder is a simple model of a calculator. It takes in two numbers of 4 bits each, allowing us to take numbers 0-15, but we will be using numbers 0-9. The numbers are then added together.  The circuit is made in Quartus II and then is programmed onto a Field Programmable Gate Array (FPGA) which allows the circuit to be used.
This project is intended to be for fun or could be a final project for a class, but is mostly to become more familiar with logic circuits. This project will make more sense if you have already taken or are currently taking a digital logic class and have a basic understanding of logic gates. Some basic commands of Quartus are also covered if you have never used it.
The FPGA has buttons, switches, LEDs, and number displays to accommodate most circuits. Quartus 2 can be purchased for around $3,000-$4,000; although, the web edition of the software is free, but still requires the purchase of an FPGA. I found FPGAs online for around $200. I used the campus software, so I did not have to purchase any equipment. It took me 6 hours to complete the adder from scratch my first time. My hopes with these instructions are for you to be able to complete the 4-bit adder in less than 5 hours. Completion of this circuit will bring you greater understanding and fulfillment with its complexity.

Note: Pictures at the beginning of each page show given steps in the process. They are to prevent confusion

would you know how to write a VHDL file for this?