The full adder is the device that does the actual adding in our entire program. The component takes in two bits and performs bitwise addition. Addition goes through first the 0’s place, then the 1’s place, and so on.  If there is a carry from the previous place, it must be added in as well. A half adder does not consider the carry from previous mathematical operations.
1) Create a new BDF.
3) Add 2 XOR gates to the file, side by side.
4) Add 2 2-input AND gates below the right XOR gate. The AND gates should be in a line vertically.
5) Add a 2-input OR gate to the right of the 2 AND gates, roughly between the two vertically.
6) Connect the output of one XOR gate to one input of the other XOR gate.
7) Connect that same wire to one input of the top AND gate.
8) Connect the other input of that AND gate to the other input of the right XOR gate.
9) Connect the outputs of the AND gates to the inputs of the OR gate.
See Picture
10) Add 3 input pins to the left of what we have, in a vertical line.
11) Label the top pin A.
12) Connect A to one input of the left XOR gate and to one input of the bottom AND gate.
13) Label the second pin B.
14) Connect B to the other input of the left XOR gate and to the other input of the bottom AND gate.
15) Label the third pin Ci (carry in).
16) Connect Ci to the wire connecting the input of the right XOR gate to the input of the top AND gate.
18) Label one Sum.
19) Connect Sum to the output of the right XOR gate.
20) Label the second Co(carry out).
21) Connect Co to the output of the OR gate.
See Picture
22) Save the file.
23) Analyze the file.
24) Create a symbol for full_adder.
<p>would you know how to write a VHDL file for this?</p>