The final state of this project is to diplay a speedometer on the Vmod TFT display. The indicator is an image that rotates on a background image.
The hardware for this project is the following:
- Nexys4 DDR
- VmodTFT LCD
The tools used in the project development are the following:
- ISE Suite Design 14.7
- EDK 14.7
The system's basics architecture is formed by:
- Microblaze controller
- LCD Controller
- Image RAM Memory
- LEDs, DIP Switches, 7Segments, PixelController, LinesColumns Peripherals
Step 1: Graphics Controller for LCD
Based on the LCD datasheet, a vhdl code was implemented to control the LCD each pixel.
- First step is to synchronise all the signals in order to be able to display one colour all over the display.
- Second step was to display a static image.
- Last step was to customize the graphic controller for being controlled by the micrcontroller. The basics graphics controller signals are RGB, data clock, TFT enable, display ON, clock and dimming for controlling the backlight intensity. All the previous signals are outputs except for the clock which is input. The signals needed for interfacing with both the micrcontroller and image BRAM are: RGBin (input), duty cycle(input), address(output), lines(output) and columns(output).
Address signal sends the current pixel position, which is a number that depends on current line and column to the Block RAM where is the image to be displayed is stored. The BRAM memory sets its output with the value contained in that memory cell. RAM memory output is connected to RGBin.
Lines and Columns are used for debug only and are connected to one of the uBlaze peripherals called LinesColumns.
Note: The .vhd file for graphic controller is in the Nexys4XPS archive in the folder pcores.
Step 2: System Architecture Design Using XPS Tool From EDK
The main part of the architecture is the uBlaze microcontroller. It is connected to many GPIO peripherals for controlling LEDs, 7Segment, Image RAM content and for reading both from DIP Switches and from graphics controller the current line and column for debug. To uBlaze is connected also the interrupt controller as a peripheral. Push buttons and internal timer are connected to interrupt controller.
Another important part of the architecture is Image RAM memory. The RAM memory is described by a vhdl code and is a simple dual RAM memory. This RAM contains the image graphics controller will display on LCD. The size of the image stored in RAM memory depends on the virtual size of the LCD. The VmodTFT LCD has 272 lines and 480 columns and a colour depth of 8 bits for each primary colour. The number of cells of the RAM memory is 130560 and each one contains the data on 24 bits. Therefore the size of the LCD is roughly 3Mb. It requires 96 BRAM block out of 135 the Artix7 FPGA has. The Image RAM memory is interfacing with Pixel Controller GPIO peripheral of uBlaze. This peripheral writes on RAM the value of each pixel. This is connected to port A of uBlaze. The port B of the RAM is connected to graphic controller.
The next part of the system architecture is graphics controller. The latter accesses the Image RAM Port B with the signal address and the Port B output is connected to its RGBin input. The graphics controller is also connected to the VmodMIB via the Pmod connectors in order to set each pixel value of the display.
Step 3: Matlab Code for Verifying Mathematical Concept.
The mathematical Concept:
The start point of the indicator is vertically. The speed is represented by the rotation of the indicator. For displaying the rotation, each pixel of the indicator should be rotated with the same angle. In order to get the new position of a specific pixel, a rotation matrix is used. Two matrices having the size of the LCD are defined. For all the pixels of the indicator the rotation matrix is applied. To the result is added the point which have to remain steady and another term that depends on the both indicator height and the rotation angle.
Step 4: C Code Using SDK Tool From EDK
The code is structured as
All the peripherals are initialized and set as inputs or outputs depending on their purpose. Additionally initial value is set where needed. The peripherals initialized are: LEDs, DIP Switches, PixelController(this peripheral writes data in Image RAM memory), RGBout(channel 2 is used for dimming control).
2. Initialization of the Image RAM
The image RAM is initialized to background image. The indicator image is set.
3. Infinite Loop
Inside the infinite loop are two for loops for indexing all the pixels of the indicator. To each pixel is applied rotation matrix following the same concept which was previously tested in Matlab. The rotation matrix method has one drawback. Not all the pixels of the rotated indicator will be covered by the indicator image pixels, but few are from background image. To compensate this bug, the applied rotation matrix has a slightly different angle.