Step 13Circuit Board Layout
To obtain the design files, go to the oscilloscope homepage.
I made the board a two-layer board. A four-layer board would have been much easier to route but
would also be much more expensive. I would not recommend etching and drilling this board yourself, it really isn't worth the effort and would require quite advanced PCB skills - the lines are quite narrow (most are 10mils/0.25mm), there are hundreds of holes and vias, and the two sides would need to be aligned very precisely. I offer the board for sale on my oscilloscope homepage very close to my own cost, in volume pricing this is a much better solution.
The bottom has a flood-filled ground plane for optimum grounding. Still, because there are so
many lines closely together, one must take care to avoid "islands", i.e. patches of supposed
ground fill that in reality do not have any connection to the surrounding ground.
The routing is done in classic fashion, with the top layer carrying all the vertical traces, the bottom
layer all the horizontal traces, with very few exceptions. The power rails are routed using wider
traces to minimize inductance and ohmic drop.
Without exception all the components are through-hole, and all the chips are DIP packaged
(mounted in sockets for easy replacement). This makes the design very easy to assemble even
with moderate soldering skills. It will also allow for inexpensive assembly and wave soldering
should I find a vendor willing to offer it as a completely assembled unit.
The components placement follows largely the logical structure of the design. On the left is the
interface (power and serial) and the power supply regulators. Left in the middle is the sample logic
(four chips), below are the microcontroller and the RS-232 level converter.
The very right side is taken up by the analog frontend (probe connectors, amplifiers, bias DACs,
discrete elements), one channel on the top and one at the bottom.
Left to the frontend is the conversion (ADC) and storage (SRAM) section, with the I/O expander
needed for data readback from the memory chips in the center.
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