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Whether you just like to tinker in your garage or you work with them professionally, knowing how to use and program FPGAs is a definite plus for anybody. The problem is that every company that makes FPGAs has their own proprietary software that you have to have in order to use the FPGA board.

Luckily National Instruments has made it possible to program many Digilent FPGA boards without having to leave the familiar and ubiquitous Multisim environment. It takes some work to do the initial set up, but once everything is all set up correctly, you'll be programming FPGAs in no time.

Step 1: Get the Correct Tools

In order to make this work, you will need to have several programs installed and working on your computer.

LabVIEW 2014 or higher (click here for more LabVIEW info and to download from NI)

Multisim 14.0 or higher (click here for more Multisim info and to download from NI)

Vivado 2014.4 or higher

Install LabVIEW first as some of Multisim's files need LabVIEW to already be installed if you want them to talk to each other. Be sure to restart your computer after each program is finished installing.

Note that when I installed LabVIEW 2016, it installed into "C:\Program Files\National Instruments" and not "C:\Program Files (x86)\National Instruments". Since Multisim and LabVIEW need to talk to each other, I moved the LabVIEW directory into "C:\Program Files (x86)\National Instruments" to ensure that they could. I don't know if this is absolutely necessary as I didn't try it before to find out. Be sure to move LabVIEW 2016 before you try and open it to avoid any possible issues.

You will also need one of Digilent's newer FPGA boards built around the Artix-7 chip.

Basys 3

Arty

CMOD A7

Be aware that this same process can be applied to Digilent's older FPGA boards built around the Spartan-6 chip, but you'll need to have Xilinx's ISE environment installed. I'll only focus on Vivado in this I'ble, so I leave it to you to ensure you have the correct ISE specific files.

The rest of the process is outlined in an NI white paper tutorial that may help. I will walk through the same steps, but with more pictures and clarity.

In order to correctly link Multisim with Vivado, you need to install the FPGA tool. Click on NI LabVIEW FPGA Vivado 2014.4 to go to the download page for the tool module. The recommended "NI Download Manager" option installs a small downloader program that will then download the installer. The "Browser Download" option downloads the installer as a *.iso image file, which will then auto-mount itself in your CD/DVD-ROM drive if you have one. Pick either one. I used the "Browser Download" option.

If the *.iso file does not auto-mount then double click on it to open it from your default Downloads folder. Double click on Setup.

1p1 setup


Click on "Next" and then enter the LabVIEW serial number that came with your install materials.

1p2 serial number


The software will do a quick search for any updates. Accept any that show up then click "Next".

1p3 updates


Accept the 3 License Agreements and click "Next".

1p4 EULA


Click "Next" again to begin installation.

1p5 start install


Get some popcorn while you watch the progress bar.

1p6 progress


Once the install is complete, be sure to restart your computer.

After restarting, navigate to "C:\NIFPGA\programs\Vivado2014_4\data\xicom\cable_drivers\nt64\digilent" on your hard drive and run the "install_digilent.exe" file. This will install Digilent Adept, if needed. Follow the onscreen prompts to complete the install.

1p7 install adept

Now that all of the correct programs and associated files are installed, let's get to programming some logic.

Step 2: A Word About "Writing" the "Code" for FPGAs

Code for FPGA chips is written in one of several hardware description languages, with the two most common and prolific being VHDL or Verilog. Within most of these HDL languages there are two different schools of thought used to write the code for the project, structural or behavioral. These methods are not language specific, but are instead conceptual methods of thinking of how to write the code. You can even use both methods in the same project if you wish with no issues.

In a behavioral design, you simply tell the compiler what you want to do and it will work it's magic in the background and compile the code in a way that the chip can understand it. Here is an example of a two-bit full adder with carry-in:

// Verilog example of a behavioral design
module Full_Adder_behavioral(
    input A,
    input B,
    input Cin,
    output  S,
    output Cout
    );
    
    wire [1:0] sum;
    
    // The next line makes it clear what we have. All three terms are added
    // together, so we must have an adder. We've described the behavior of 
    // the circuit. Note the absence of any logic declarations like "AND" or "&".
    assign sum = A + B + Cin;
    assign S = sum[0];
    assign Cout = sum[1];
endmodule

When you add three bits, the largest value you can get is decimal 3, or binary 11, so we need the 'sum' value as a placeholder for the summed bits. The compiler understands what "+" means and builds a binary adder to perform the task. The S and Cout bits are assigned to the respective bits in 'sum'.

In contrast, structural design is an explicit description of the exact logic required to process the input data correctly. Here is the same full adder, but described structurally:

// Verilog example of a structural design
module Full_Adder_structural(
    input A,
    input B,
    input Cin,
    output S,
    output Cout
    );
    
    // Here we see the use of several logic gate structures. Without deciphering
    // the logic, it would be difficult at best to know what exactly is going on
    // just by glancing at the code. Now imagine a large project with 100s of
    // lines of code to decipher.
    wire w01 = A ^ B;
    wire w02 = Cin & w01;
    wire w03 = A & B;
    
    assign S = w01 ^ Cin;
    assign Cout = w02 | w03;
    
endmodule

In this example, we have explicitly told the compiler exactly how we want the input data to be logically processed. The compiler again works its magic and compiles a file that the chip can understand. Exactly how and what it compiles is beyond the scope of this Instructable, but suffice it to say that both examples will result in pretty much the same program file.

I told you all of that to tell you this. Since Multisim is a circuit design program, we will be "writing" our code by utilizing the structural design method. But with pictures and not words. What do I mean? Here's the same full adder circuit as before, but this time with images of the logic gates used:

2p1 FA circuit

We are clearly building a logic circuit, and if visually describing the structure of the circuit isn't a structural method of coding, I don't know what you would consider should qualify. And with Multisim, this is all that is needed to program the board. Let's look at how.

Step 3: Now Let's Write Some Code

Well, more like draw a picture, but you get the idea. Let's start with the full adder circuit from the previous step.

Open Multisim and you should see the default blank canvas for designing and simulating analog circuits.

3p1 MS open


Move up to the top left and click on "File" and select "New".

3p2 new project


In the window that pops up, click on the "PLD design" button at the top and then "Create" at the bottom.

3p3 new PLD


The next window lets you pick your configuration file. This is where you can choose the various Digilent board definitions that were loaded during the install process. You can choose a standard definition from the drop menu, you can load a custom configuration file if you have one, or you can create an empty PLD project. For this project I'll be using Digilent's Basys 3 FPGA trainer board. Click "Next" once you have your board selected.

3p4 board select


Give your project a name in the next window. Since I'll be building a full adder, that seems appropriate here. Click "Next" once you're done.

3p5 name the project


In the next window you can select all of the external I/O peripherals attached to the board that you want to add to the project. For this project, I'll need 5 LEDs and 3 switches, so I chose LED0 → LED4 and SW0 → SW2. Click "Finish" after you've made you selections.

3p6 select connectors


The PLD project will now appear in the Design Toolbox on the left side of the Multisim window and the canvas will now display the selected I/O connectors.

3p7 PLD canvas


There are two ways to place components. The first is to click on the small icon of an AND gate in the tool bar. This will open the component picker window and default to the logic gate filter. The second option is to click on "Place" in the menu bar at the top and then select "Component" to open the same component picker window.

3p8 pick components


For this project we'll be using basic logic gates, so select that from the menu on the left and highlight the first gate you want to place. Place it, then select the next gate. Keep placing gates until you have all that you need. We'll need 2 XOR2, 2 AND2, and 1 OR2 gates for the full adder. Connect everything like in the image below. Note that while you can change the connector labels, it is not recommended.

3p9 finished circuit

Step 4: Programming the FPGA

The next step is to send the code to the FPGA. Make sure that your FPGA board is connected via USB and that it is turned on. Then click on "Transfer" in the menu bar and select "Export to PLD...".

4p1 export to PLD


In the next window you can select one of several options. Click the radio button to select "Program the connected PLD".

4p2 program PLD


In the next window be sure that the "NI LabVIEW FPGA" tool option is highlighted in the box. Click "Finish" at the bottom to program the FPGA. I also tried using the "Xilinx Vivado 2016.4" option and it worked fine.

4p3 finish programming


Multisim will then connect to Vivado to generate the correct files it needs to program the board. This may take several minutes. Once the 4 steps are complete, your board is programmed and ready.

4p4 programming status


Here is my Basys 3 with the Full Adder circuit loaded.

4p5 Basys 3 demo gif

Step 5: That's It!!

As you can see, programming FPGAs is really simple with Multisim. You only need a working knowledge of how logic circuits work. You certainly don't need to go through the struggle of learning a completely new HDL programming language.

As always, thanks for reading. If you have questions, please ask them in the comments below, though PMs are always welcome as well. You just never know when someone else has the same question and that way we can all learn and help each other get better. Have fun building!


Also, please check out the Digilent blog where I contribute from time to time. Just click the image below.

10p1 blog

About This Instructable

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Bio: I've always loved to figure out how things work, so hacking and making just fits for me. I'm an intern at Digilent Inc ... More »
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