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Step 6Configuring Timer/Counter 0
CTC mode can be used to toggle the output OC0A on Pin 2, Port B (physical pin 14). To enable output on this pin, DDRB must be set appropriately. The C code for this is just like setting up an output for a blinkenlight.
DDRB = _BV(PB2); // Port B2 is an output.
The next step is to supply a clock signal and load the output compare register to produce a waveform as a frequency. The equation for the resulting frequency is given in the data sheet (page 72). Terms in the equation will be described below. Here's the equation:
fOC0A = fclk_I/O / 2*N*(1+OCR0A)
Where fOC0A:= output frequency
fclk_I/O:= clock source frequency
N:= clock prescale factor
OCR0A:= value in output compare register for Timer/Counter 0A.
Clock Source Frequency, fclk_I/O
This is the frequency of the system clock. The default value is 1MHz. Bits CS00, CS01, and CS02 of TCCR0B control this selection. Since these bits also select the value of N, it is described next.
Prescaler Value, N
N is the value used to divide, or prescale, the system clock. Bits CS00, CS01, and CS02 of TCCR0B control this selection. Table 41 on page 81 of the ATtiny2313 data sheet describes the combinations. Since a frequency near 1kHz is desired, bits CS00 and CS01 of TCCR0B will be set. Note that setting all three bits to 0, thus selecting no clock source, effectively stops the output. This is the method that will be used to start and stop the beep.
TOP Value, OCR0A
This value is the TOP value for the counter which is loaded into the Output Compare Register for Timer/Counter 0A. When this value is reached, the counter will be reset to zero and counting will begin again until TOP is reached and the cycle repeats. TOP is easily modified, so the frequency of the beeper is easy to change. Since a frequency near 1kHz is desired, TOP is set to 7. (Note the prescaler could have been set to 8, and TOP set to 63. Same result - your choice.)
Output Frequency, fOC0A
Using the equation to calculate the output frequency results in:
fOC0A = 1,000,000 / 2 * 64 * (1+7)
fOC0A = 977Hz
Close enough! Here's the code to load the Output Compare Register and the Timer Counter Control Register 0B. Please see the actual program code to understand how these are used.
OCR0A = 7; // Time Value
TCCR0B = _BV(CS01) | _BV(CS00); // Select internal clock & prescale=8
TCCR0B = 0; // no clock source turns tone off
Setting the Time/Counter Mode
As a last detail, we'll specify the Timer/Counter mode we desire by setting appropriate bits in Timer/Counter Control Register 0A. CTC mode is selected by setting bit WGM01 as described in Table 40, page 79 of the data sheet. Since we want the output to toggle each cycle, bit COM0A0 also needs to be set as described in Table 34 on page 77. Here's the code:
TCCR0A = _BV(COM0A0) | _BV(WGM01); // CTC Toggle Mode
DDRB = _BV(PB2); // Port B2 is an output.
The next step is to supply a clock signal and load the output compare register to produce a waveform as a frequency. The equation for the resulting frequency is given in the data sheet (page 72). Terms in the equation will be described below. Here's the equation:
fOC0A = fclk_I/O / 2*N*(1+OCR0A)
Where fOC0A:= output frequency
fclk_I/O:= clock source frequency
N:= clock prescale factor
OCR0A:= value in output compare register for Timer/Counter 0A.
Clock Source Frequency, fclk_I/O
This is the frequency of the system clock. The default value is 1MHz. Bits CS00, CS01, and CS02 of TCCR0B control this selection. Since these bits also select the value of N, it is described next.
Prescaler Value, N
N is the value used to divide, or prescale, the system clock. Bits CS00, CS01, and CS02 of TCCR0B control this selection. Table 41 on page 81 of the ATtiny2313 data sheet describes the combinations. Since a frequency near 1kHz is desired, bits CS00 and CS01 of TCCR0B will be set. Note that setting all three bits to 0, thus selecting no clock source, effectively stops the output. This is the method that will be used to start and stop the beep.
TOP Value, OCR0A
This value is the TOP value for the counter which is loaded into the Output Compare Register for Timer/Counter 0A. When this value is reached, the counter will be reset to zero and counting will begin again until TOP is reached and the cycle repeats. TOP is easily modified, so the frequency of the beeper is easy to change. Since a frequency near 1kHz is desired, TOP is set to 7. (Note the prescaler could have been set to 8, and TOP set to 63. Same result - your choice.)
Output Frequency, fOC0A
Using the equation to calculate the output frequency results in:
fOC0A = 1,000,000 / 2 * 64 * (1+7)
fOC0A = 977Hz
Close enough! Here's the code to load the Output Compare Register and the Timer Counter Control Register 0B. Please see the actual program code to understand how these are used.
OCR0A = 7; // Time Value
TCCR0B = _BV(CS01) | _BV(CS00); // Select internal clock & prescale=8
TCCR0B = 0; // no clock source turns tone off
Setting the Time/Counter Mode
As a last detail, we'll specify the Timer/Counter mode we desire by setting appropriate bits in Timer/Counter Control Register 0A. CTC mode is selected by setting bit WGM01 as described in Table 40, page 79 of the data sheet. Since we want the output to toggle each cycle, bit COM0A0 also needs to be set as described in Table 34 on page 77. Here's the code:
TCCR0A = _BV(COM0A0) | _BV(WGM01); // CTC Toggle Mode
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