Introduction: Universal Analog Hardware Testbench
Teaching basic Analog and Digital Electronics at undergraduate level consists of theory classes with hands-on-training conducted in an electronics laboratory equipped with Oscilloscopes, Function Generators and Regulated Power Supplies. Students are taught the characteristics of basic components like diodes, BJTs, FETs, OPAMPs and Digital devices.
Carrying out practical laboratory experiments by students reinforces classroom teaching of theory. Standard laboratory equipment is often beyond the reach of several educational institutions worldwide because of the large cost element involved. Practical laboratory experimentation is therefore curtailed.
To overcome this drawback I set about the task of building a low cost teaching aid for basic analog / digital electronics. This would enhance the availability of laboratory test equipment to educational establishments and the student community.
My primary goals were the following:
- Should be a stand-alone system
- Keep the hardware cost to less than $40.
- Use readily available components
- Keep the fabrication simple so that students could fabricate it themselves.
- Cover all experiments related to basic components like diodes, BJTs, FETs, OPAMPs and Digital devices.
- Hardware built around a dsPIC30f4011 micro-controller
- Serial interface to a host PC
- Six ±10V, 10Bit analog input channels with an input impedance of typically 1MΩ and a maximum sampling rate is 2 mega-samples/sec.
- Three ±10V, 10Bit, analog output channels with a throughput rate is 20 kHz, two with a drive capability of ±10mA and the third power amplified to provide a drive of ±200mA.
- Four buffered digital I/O channels
- For ease of availability and in order to provide power to the circuits under test, a standard PC SMPS used as the power supply.
- Micro-controller operations commanded by a Host PC using a GUI developed in Visual Basic. With the database manipulation and graphing properties of .Net 2 being fully exploited.
- The hardware cost was $35.
By providing technical data and executable software free for non-commercial use I wish to encourage the computer aided teaching of basic electronics.
View a demonstration of one of the electronic experiments:
I look forward to any questions or feedback, contact me at:
Email: ajoyraman@gmail.com
Webpage: http://www.ajoyraman.in
Step 1: Hardware Block Diagram
The simplified block schematic of the ATE system is shown. For ease of availability and in order to provide power to the ATE unit and the circuits under test a standard PC SMPS is used as the power supply. Three fuses are added in the +5V, +12V and -12V lines from the SMPS to the ATE unit for safety as the SMPS though short circuit protected is rated for a much higher current capacity than that required for testing of simple circuits.
The ATE-Unit is connected to any available serial port on a PC with Windows XP / Windows 7 operating system. It is also possible to connect the unit to the PC USB port using a USB-Serial port adapter. This serial port connection along with the “Universal Analog Hardware Test Bench” Ver1.0 software provides communication with the ATE-Unit.
The circuit under test can be rigged up on a standard breadboard and powered from the power sockets provided. Power to the ATE and to the circuit under test comes ON only when the power switch on the ATE unit is activated.
The ATE unit provides three ±10V, 10Bit, analog output channels Vout1, Vout2 & Vout3 to the circuit under test. While Vout1 & Vout2 are Op-Amp outputs with a drive capability of ±10mA, Vout3 is power amplified to provide a drive of ±200mA.
Six ±10V, 10Bit analog input channels (Ain1 – Ain6) with an input impedance of typically 1MΩ are provided to read back analog data from the circuit under test.
Four buffered digital I/O channels (Dout1-Dout4 & Din1-Din4) are also provided for connection to the circuit under test.
A ‘Microchip’ DSPIC30F4011 micro-controller which interfaces with the Analog/Digital I/O and is connected to a PC through a serial interface forms the heart of the ATE system. The micro-controller operations are commanded through the serial link by the Host PC using the dedicated ATE software.
Step 2: Experimental Setup
The figures show the front and rear panel connectors, switches and indicators and a typical connection between the ATE-Unit, SMPS, PC and Circuit under test.
Using this setup a voltage sequence can be fed from Vout1 to the Resistor-Diode circuit and the voltages at the input and diode point monitored. The ATE system could then plot the V-I characteristics of the diode where V, the diode voltage is Ain1 & I , the diode current is Ain2-Ain1/R1 in mA. (Refer Experiment 1 – Diode Characteristics in the Aj-ATE Experiments pdf document)
Step 3: List of Experiments
This is a quick look at 32 typical experiments that can be performed using this system.
The page numbers correspond to the 'Aj-ATE Experiments.pdf ' provided with the 'Documents and Software' step.
Step 4: Executing the Software
Make the connections as given in step 2. Switch On power to the ATE-Unit and execute the Aj-ATE application on the Host PC. This will bring up the opening screen ‘Welcoming You’ to the Aj-ATE application.
The ‘About’ Screen is the first to be displayed, the screen also indicates the other tabs corresponding to Connect COM Port, Manual Mode, Burst Mode, Capture Mode, Plot Data and Calibrate.
Step 5: Establishing Communication
Open the ‘Connect COM Port’ tab. (Shows Screen 1).
Select ‘Click to Open’: This shows the available COM Ports.(Screen 2)
Select the COM Port to which the ATE-Unit has been connected: Selected value Shows COM2 and other diagnostics show that there were 2 ports available and the port with index 0 has been selected.(Screen 3)
Select ‘Test’: Indicates that the connection is established and the ATE-Unit is ready (Screen 4)
Step 6: Manual Mode
There are two panels ‘Set Outputs’ & ‘Read Inputs’ (Screen 1)
Set Outputs: There is an indication that we are connected to ‘COM2’ and the default output settings are Zero Volts and all Digital outputs set to Logic ‘0’
Analog Outputs: To set Vout1 enter the value in the grey box and click on ‘Set Vout1’ the value set is indicated in the ‘VO1 value’ box in Hex.
For example 4.93V set for Vout1 is indicated as 2FC Hex, where 000 Hex corresponds to -10V and 400 Hex corresponds to +10V. (Screen 2)
It is also possible to set all three Vout values simultaneously by entering the voltages and clicking on the ‘Set ALL’ box. (Screen 3)
Digital Outputs:
Checking the check-box corresponding to the Digital output bits and clicking on the ‘Set Digital Outputs’ box sets the digital outputs. The value set is indicated in the box as a Decimal Number 0-15 where DigitalOut1 is the LSB and DigitalOut4 is the MSB. (Screen 4)
Read Inputs:
Analog Inputs:
To read the analog input Ain1 individually the corresponding ‘Read AIN1’ box needs to be clicked and the value in volts is displayed. (Screen 5)
All Analog inputs can be read simultaneously by clicking on the ‘Read ALL’ box.
For example for Ain1 & Ain2 connected to Vout1 we get the Screen 6.
Digital Inputs:
Clicking on the ‘Read Digital Inputs’ reads and displays the individual digital input bits. The value read is indicated in the box as a Decimal Number 0-15 where Digitalin1 is the LSB and Digitalin4 is the MSB.
For example Din2 is ‘High’ and the rest are ‘Low’ Screen 7.
Step 7: Auto Mode
Choosing the ‘Auto Mode’ Tab brings up the Automatic Mode Screen. This mode is one of the primary modes of operating the ATE system. It permits entry and storage of voltage sequences for Analog and Digital outputs in an embedded database. Values in the database can then be output in sequence and the values corresponding to the analog and digital inputs acquired. The data can be stored back to the database or exported to an Excel file. The ‘Plot Data’ is used in conjunction with this mode for immediate plotting and display.
The following example shows the operation of the ‘Auto Mode’
With reference to the ‘Auto Mode’ Screen 1, shown, the database file is preloaded with three voltage sequences of 80 samples length.
Vout1 is a sequence from +10V to -10V in 0.25V steps, Vout2 and Vout3 are 9.5V amplitude Sin Wave and Cosine Wave sequences.
A dummy digital sequence is also provided.
It is possible to edit the database file entries and save the data using the save button.
Running a Sequence:
This example (Screen 2) shows that a Vout1 sequence from 1 to 81 has been selected with a delay of 1 and repeat cycles 1. Ain1 & Ain2 have been selected for data acquisition.
In practice a time-delay can be selected to be inserted between each data-out and data-in. If there is a requirement to run the sequence in a repetitive manner the ‘cycles’ can be entered.
It is also possible to run the sequence from any start-value to any end-value if data has been entered.
Digital Data may also be selected for output where the value Dout corresponds to Dout1 (LSB), Dout2, Dout3 and Dout4 (MSB) to be entered as a decimal value 0-15.
Run:
Clicking on the ‘Run’ button executes the data-out and data-acquisition and the button indicates ‘Busy’ (Screen 3)
When the system indicates ‘Busy’ no other input should be initiated as it is ignored. Also if more than one cycle is selected only the data-acquired during the last cycle is displayed.
Running the example the data captured is displayed as in Screen 4.
Looking at the values of Ain2 around the ±1V values of Vout1 shows ~0.7V for +ive voltages and voltage increasing with input for negative voltages. This is a quick look at the diode characteristics.
Saving data / Export to Excel / plotting data:
Either Data can be stored back to the database file using the ‘Save’ icon, or data can be exported to Excel for further data-processing or the ‘Plot Data’ mode option can be used to plot the data.
First: Saving the data – Simply click on the save icon.
Second: Export to Excel – Click on the 'Export to EXCEL' Button. This opens a Excel File with all the data columns from the dbase file and permits us to save the data to a Excel file.
The EXCEL display (Screen 5) shows the values of Ain1- Ain2 corresponding to the Diode current computed and plotted against the diode voltage Ain2 showing a typical Diode V-I characteristic.
Closing Excel returns back to the ATE screen with 'Export Complete' displayed
Step 8: Plot Data Mode
In the earlier step a +10V to -10V data sequence was output to a resistor-diode test circuit and the acquired data was saved and exported to Excel where the diode V-I Characteristics were plotted.
The ‘Plot Data’ inbuilt into the ATE Host software permits all these functions to be carried out on the acquired data.
Selecting the ‘Plot Mode’ tab brings up the following Screen 1.
A common data base is used between all modes of the ATE and the data acquired in the Auto Mode is available for plotting & display.
To plot the data the ‘Plot Range’ needs to be selected by entering the values for ‘Start_ID’ and ‘End_ID’.
Data can be plotted with respect to the ID number or in X-Y mode as follows:
Plot versus ID:
For this example ‘ID’ is selected for the X-Axis and Ain1 & Ain2 for the Y-Axis 1 & Y-Axis 2. The ID range is set from 1 to 81 and the Plot Button clicked. This gives us the first plot. (Screen 2).
Label and Title
The plot axis can be labeled and the title inserted by typing into the corresponding boxes. Adding the Title and the Axis labels the following plot is obtained. (Screen 3).
Additional traces can be added to this plot by selecting ‘Add Plot’. Symbols can also be displayed for clarity on the traces by selecting the ‘Symbols’ check-box.
Adding one more trace ‘Ain1-Ain2’ to the Y-Axis 1 with ‘NA’ selected for Y-Axis 2 and with the symbol selected the plot gets modified as Screen 4.
The Diode Characteristics now show that the forward current through the diode is limited by the input resistor and that the forward drop is ~0.7V. The reverse characteristics show the diode voltage following the input voltage with zero current.
X-Y Plot:
The same data can be plotted in X-Y mode by selecting ‘Ain2’ as the X-Axis, ‘Ain1-Ain2’ as the Y-Axis 1 and ‘NA’ for Y-Axis 2.
‘Ain2’ corresponds to the Diode Voltage and ‘Ain1-Ain2’ corresponds to the Diode current.
Selecting the plot range as before and with suitable axis labels the V-I characteristics of the diode under test can be directly plotted.(Screen 5).
Display, Save & Print Features:
Display features such as Zoom & Pan are selected by the Mouse and a Contest Menu including the Save Image & Print options can be selected with the right mouse button. (Screen 6).
Step 9: Burst Mode
Description
The Burst Mode overcomes the relatively slow serial I/O process between the host PC and ATE-Unit which is used in the Manual and Auto Modes. In the Burst Mode, a sequence of values corresponding to Vout3 is first transferred to the micro-controller. A Run command outputs these values a much faster rate and acquires the corresponding values of Ain1 and Ain2 into memory. The acquired data is transferred back to the PC using the Read command.
The ‘Burst Mode’ permits signal generation and acquisition with definite time stamping of events.
By permitting cycling of the sequences this mode is effectively an arbitrary function generator with a maximum of 100 programming steps.
In this mode only ‘Vout3’ is used for the output and ‘Ain1 & Ain2’ are pre-selected for data acquisition.
The Start-ID to End-ID difference is also restricted to a maximum of 100.
Selecting the ‘Burst Mode’ brings up Screen 1.
In this mode the data range is selected as before.
The delay between each ‘Vout3-Ain1-Ain2’ execution time is set with the ‘Add_Delay’ setting.
The number of cycles of for which the Vout3 sequence runs is a multiple of the ‘Cycles’ and ‘Repeat_Cycles’ settings.
Demonstration
Conducting an experiment on the DM74121 Monostable Multivibrator demonstrates the operation of the burst mode.
The test circuit is rigged up as given in Screen 2.
Next the Vout3 data is modified to give a single 0-4V pulse for two samples after a starting delay of 10 samples. The further values up to 50 are set to zero. (Screen 3)
Entering the ID range from 1 to 50 with add-delay, cycles, repeat-cycles of 1 and clicking on the ‘Load Data’ button changes the screen to Screen 4.
The software has now calculated the delay/sample as 0.0001 sec or 100µsec/sample the equivalent frequency for running all the data points and the run-time as 0.005 sec.
Initiating the ‘Run’ tasks the micro-controller to output the values of Vout3 in sequence at 100µsec intervals and store the acquired values of Ain1 & Ain2 in its the internal memory. The ‘Run’ button (Screen 5) indicates busy during this period and the ‘Busy’ indicator flashes on the ATE unit.
‘Run’ can be initiated any number of times as it will execute based on the data loaded earlier.
Clicking on the ‘Read Data’ button transfers the Ain1 & Ain2 values from the micro-controller memory to the host PC and updates the data base file. The changes in Ain1 & Ain2 and the level change in Ain2 can be observed. (Screen 6).
Plotting this data using the ‘Plot Data’ mode displays the result. (Screen 7).
In this demonstrative experiment the ATE is operated in Burst Mode, a 0-4V Pulse is fed to the B-input of the 74121 from Vout3 and the Q-output observed at Ain2. The Q-output goes High when triggered by the B-input and stays High for a period of 2000uSec against a calculated value 0.7*R1C1=1680uSec.
Step 10: Capture Mode - (A DSO Mode)
Initiating the ‘Capture Mode’ gives the initial screen. (Screen 1).
There are three capture modes:. (Screen 2).
For unknown signals the ‘Free Running Mode’ is selected first as it is applicable for both repetitive and non-repetitive signals and does not need a trigger input. The sampling rate setting for this mode is the same as that of the ‘Continuous Mode’.
Once an unknown signal has been acquired using the ‘Continuous Mode’ the amplitude information is available and a trigger level can be set. This trigger level is applicable only to ‘Ain1’.
The ‘Continuous Mode’ can be used for repetitive & non-repetitive signals where ‘Ain1’ is connected to the signal providing the trigger and ‘Ain2’ to any other point in the circuit to be monitored. The sampling rates from the drop-down box are from 30µsec/sample to 50msec/sample. The maximum throughput rate is ~33 kilo-samples/sec. (Screen 3).
In order to extend the bandwidth of the captured signals the ‘Sliding Mode’ utilizes the principle of sliding the sample point with respect to the trigger point by known intervals and reconstructing the input signal. This mode is applicable only to repetitive signals. The advantage in this mode is that the effective sampling rate can be much higher than the ‘Continuous Mode’. The sampling rates achieved are from 0.5µsec/sample to 50µsec/sample with an effective maximum throughput rate of 2 mega-samples/sec. Input signals up to 50 kHz can be captured using this mode. (Screen 4).The ‘Capture Mode’ is a pure data-acquisition mode where no data is output from the ATE unit. When used in conjunction with the ‘Plot Data’ mode the function is equivalent to a ‘Digital Storage Oscilloscope’ with a maximum of 100 data samples.
Initiating the ‘Capture Mode’ gives the initial screen. (Screen 1).
There are three capture modes:. (Screen 2).
For unknown signals the ‘Free Running Mode’ is selected first as it is applicable for both repetitive and non-repetitive signals and does not need a trigger input. The sampling rate setting for this mode is the same as that of the ‘Continuous Mode’.
Once an unknown signal has been acquired using the ‘Continuous Mode’ the amplitude information is available and a trigger level can be set. This trigger level is applicable only to ‘Ain1’.
The ‘Continuous Mode’ can be used for repetitive & non-repetitive signals where ‘Ain1’ is connected to the signal providing the trigger and ‘Ain2’ to any other point in the circuit to be monitored. The sampling rates from the drop-down box are from 30µsec/sample to 50msec/sample. The maximum throughput rate is ~33 kilo-samples/sec. (Screen 3).
In order to extend the bandwidth of the captured signals the ‘Sliding Mode’ utilizes the principle of sliding the sample point with respect to the trigger point by known intervals and reconstructing the input signal. This mode is applicable only to repetitive signals. The advantage in this mode is that the effective sampling rate can be much higher than the ‘Continuous Mode’. The sampling rates achieved are from 0.5µsec/sample to 50µsec/sample with an effective maximum throughput rate of 2 mega-samples/sec. Input signals up to 50 kHz can be captured using this mode. (Screen 4).
Demonstration:
Conducting an experiment on the LM555 timer IC free-running as an astable multiivibrator demonstrates the operation of the ‘Capture mode’. The test circuit is rigged up as in Screen 5.
When powered On the LM555 Oscillates in astable Mode. The Waveforms at Vout, Ain1 & Capacitor C1 Ain2 are to be captured.
Free Running Mode:
Open the ‘Capture Mode’, select ‘Free Running Mode’ with the ‘Continuous Mode’ set to 50µsec/sample. (Trigger value & Edge are not used in this mode)
Initiate ‘Run Capture’ and observe the ‘Busy’ indication on the ATE hardware. The light remains ON when busy. During this interval the micro-controller acquires ‘Ain1 & Ain2’ and stores the data in the internal memory.
Initiating ‘Read Data’ transfers the acquired data to the host PC and updates the data base. Data can now be displayed using the ‘Plot Data’ mode. (Screen 6).
The signals captured in the ‘Free Running’ mode shows the typical charge-discharge waveform at the capacitor point and rectangular waveform at the output. The period of oscillation is 2.25msec corresponding to a frequency of 444 Hz.
Continuous Mode:
Repeating the Capture process by selecting the ‘Continuous Mode’, with the Trigger Value at +2V with positive edge triggering results in a waveform display aligned with the rising edge of the output. (Screen 7).
Sliding Mode:
The value of ‘C1’ in the circuit is now changed to 0.001µF and the capture repeated in ‘Sliding Mode’ with suitable change to the sampling rate. (Screen 8).
The frequency obtained is 45 kHz.
Step 11: Testing Digital Circuits
Tests can be carried out in ‘Auto Mode’ on digital circuits using ‘Combinational Logic’ or ‘Sequential Logic’ by setting up the 4-bit digital output using ‘Dout’ data to provide inputs to the circuit under test and reading back the digital data using ‘Din’ to display the 4-bit input data.
There is no restriction on using the analog-outputs and analog-inputs simultaneously so Mixed Analog/Digital circuits can also be tested.
Demonstration:
Digital Circuit Testing is illustrated with a SN7493, 4-Bit Binary Counter example:(Screen 1).
R0 (1) & R0 (2) Connected to Dout1, are kept High (Counter Reset) and two negative going pulses are fed at Dout2. Dout1 is then set to Low (Count) and a series of negative going pulses is fed at Dout2. Din1 the 4-Bit Output is observed. (Screen 2).
Additional text can be added to the saved image using a graphic editor.
The timing sequence shows that the Counter output is in Reset for R0(1)/R0(2) =1 and in Count mode for R0(1)/R0(2) =0. The Counter increments on each negative edge of the clock input.
Step 12: Calibrate Mode
Calibration:
The Calibrate Mode facilitates the improvement in accuracy of the analog input channels when used in the ‘Manual’ and ‘Auto’ modes.
Assuming a straight line approximation the offset and gain values can be set as correction factors for each channel using Screen 1.
Offsets:
In ‘Manual Mode’ Ain1-Ain6 are connected to ground and the offset values noted. (Screen 2)
These values a then entered as offsets for the analog input channels. (Screen 3)
Clicking on the ‘Load_Calib_Data’ button loads the offset values.
Gain error:
The values of Ain1-Ain6 for +9.5V / -9.5V are then obtained in ‘Manual Mode’ using Vou1 and crosschecking the value with a digital multi-meter. (Screen 4 - 5).
The gain values are then calculated and entered. (Screen 6).
Crosscheck:
The Calibration is saved and inputs crosschecked at +9.5V, -9.5V & Zero. (Screen 7 - 9)
Step 13: Circuit Diagram and Functions
Overall Circuit:
The overall circuit schematic is shown in the figure. The full size version can be seen by clicking on the image and if necessary downloading the large file. A two page print version is also given in the fabrication step along with the 1:1 PCB files.
Power Supply:
The power supply is derived from the ±12V and +5V outputs of the PC SMPS which are protected by 250mA and 500mA fuses respectively.
U3 provides 9V from +12V and U4 provides +5V from the +9V.
R1 adjusts the Pin1 voltage of U2 which is powered by -12V in order to provide a -2.5V offset voltage for the analog input stages.
DSPIC30F4011 Circuit:
The basic interconnect of the DSPIC30F4011 micro-controller is shown in the figure.
+5V forms the VDD/ AVDD and Gnd the VSS, a filtered version of +5V forms the +VREF.
Pins 4-9 AN2-AN8 form the six analog input channels.
Pins 13 &14 are connected to the 6MHz crystal.
Pins 15 & 16 are used for the serial communication
Pin 19 OC4 is the PWM reference for the Sampling – DAC
Pins 23, 22 & 18 form the PWM DAC outputs
Pins 27-30 are the digital inputs
Pins 35-38 are the digital outputs
Pin 34 is used to indicate Busy
Pins 25 & 26 are reserved for serial programming
And Pin 17 is used as the edge trigger interrupt for the Analog Input Channel 1
Serial Interface:
A simple serial interface is based on the availability of +5V and -2.5V supplies. Q5 forms an inverter and TTL level converter for the PC TX Data and Q6 takes the micro-controller TTL TX Data and converts it into pseudo RS232 levels of -2.5V to +5V suitable for the PC RX Data.
The data rate programmed in software is 115 KBPS.
Analog Interface:
U1A forms the input interface for analog channel 1. The Potential divider R2+R3 & R6 creates an input impedance of ~1MΩ and a divide by 8 for the input ±10V signal. The potential divided signal appears at the output of U1A with a non-inverting gain of 2.
A -2.5V offset voltage is fed at R8 which appears as a +2.5V offset at the output of U1A because of the inverting unity gain R9/R8.
Effectively the ±10V input signal appears as a 0 to +5V signal at AN2. The input impedance is ~1MΩ and the frequency response determined by the Wide Bandwidth FET OpAmp LF353 characteristics is typically 2 MHz.
Interrupt Circuit:
The output of U1A forms one of the inputs to the Comparator IC U16, LM311. The other input is formed by averaging of the PWM output OC3. U16 is configured as a comparator with Hysteresis using the feedback resistor R43.
In operation the interrupt mode is invoked by software during the Continuous and Sliding functions of the ‘Capture Mode’. The output of U1A is compared with the average value of OC3 which lies between 0 and +5V and a rectangular waveform is generated at the interrupt input. This interrupt is used to select the +ive / -ive edge for triggering the ‘Capture Mode’.
Digital Input/Output interface
A 54LS244 Octal Buffer, U5 is used to buffer the Digital Inputs and Outputs to and from the micro-controller. This provides buffering and protection to the micro-controller I/O pins.
Digital to Analog Converter Circuits
A novel PWM based Digital to Analog Converter circuit has been realized as part of the Aj-ATE hardware.
Simple Digital-to-Analog Converters (DACs) realized by low-pass-filtering micro-controller generated Pulse-Width-Modulated (PWM) signals have a response which is typically a tenth of the filter cutoff frequency. This design idea is a novel implementation of a method outlined in (Reference 1) employing a reference ramp whose output is sampled-and-held by the PWM signal providing a throughput rate equal to the PWM frequency. The circuit implements a ±10V, 10 Bit DAC with a throughput of 20 KHz.
A Microchip DSPIC30F4011 is operated at a clock frequency of 96 MHz and the Capture PWM signals are set for a count of 1200 corresponding to a PWM frequency of 20 KHz. PWM signal OC4 with a fixed count of 1170 is used as a reference for ramp generation and OC1 controls the PWM-DAC. IC U1A along with PNP transistor Q1 forms a precision current source charging capacitor C2. OC4 inverted by IC U3A switches ON NPN transistor Q2 for a period of 30 counts generating a nominal 0-5V ramp at capacitor C2. The ramp is buffered amplified and offset by IC U1B, the gain and offset are adjusted by potentiometers R5 and R2. PWM signal OC1 differentiated by capacitor C3 and resistor R9 is inverted by IC U3B forming a 1uSec sample signal for the sample-and-hold IC U2. U2 Pin 5, forms the DAC output and is adjusted to -10V, 0V and +10V for OC1 PWM counts of 88, 600 and 1112 respectively, corresponding to a 10 Bit count of 1024.
The count of 88 helps avoid the initial non-linear region of the ramp such that the PWM-DAC shows good linearity a LSB of 20mV and an accuracy of ± 40mV. Additional PWM-DACs could also be implemented using Capture PWM outputs OC2 and OC3.
Buffered Analog Output Vout3
The PWM-to-Analog signal chain for Vout3 is shown. OC3 is the PWM output which after differentiation by C8-R29 and inversion by U13B forms the sample-and-hold input to S/H IC LF398, U9.
The -10 to +10 V ramp forms the signal input to S/H IC LF398, U9. The output of U9 is the un-buffered analog signal corresponding to Vout3.
IC U8 output is buffered by a simple Class-B push-pull stage formed by Q1 & Q2. The combination of U8, Q1 & Q2 forms a non-inverting unity gain buffer amplifier stage. Transistors Q2 & Q3 along with R21 & R22 limit the output current to ±300mA.
Step 14: Fabrication of the Hardware
The images show the fabrication details of the ATE-Unit.
The PCB was fabricated by the toner transfer method using the printing the pcb.pdf files 1:1 on A4 size paper.
The PCB Gerber files are also provided along with the documentation and software
Note PCB Bottom View:
• The addition of 0.1uF supply by-pass capacitors on the DSPIC30F4011 micro-controller
• One jumper for the -2.5V output of the 7905 to R61 supply end. The other end of R61 is connected to the collector of Q6.
Step 15: Documentation and Software, Hardware Cost
Documents and Software Code related to the ATE-System are contained in the file ATE_Final_25 Sept 12.rar
DOCUMENTS
Aj-ATE-Experiments.pdf
Aj-ATE-Hardware-Manual.pdf
Aj-ATE-User-Manual.pdf
DSPIC30f4011-HEX CODE
aj-ate.hex
PCB Gerber Files
ATE-PCB.zip
VB.Net 2.0 Software
Aj-ATE.rar
Attachments
Step 16: Verification & Validation
The micro-controller software was developed using the Microchip MPLAB environment and validated over several days of testing and usage
The Host Computer software was developed on a Desktop Computer with a an Intel P4 CPU and IGB RAM running Microsoft XP Sp 3. VB.NET 2 was used as the development system.
The VB software has been ported on to the following systems and checked:
- Intel P4 1.6 GHz 1GB RAM Win XP Sp 3
- Intel Core 2 Duo 2GHz 1GB RAM Win Xp Sp 3
- Intel Core 2 Duo 2GHz 1GB RAM running Win Xp Sp 3 within Virtual Box on Debian Linux Squeeze
- Dell Inspiron 1525 with Intel Core 2 Duo 2GHz 2GB RAM Win Xp Sp 3
- Dell Inspiron 1525 with Intel Core 2 Duo 2GHz 2GB RAM Windows 7
- Initial development was on a bread-board where the basic hardware was finalized. Power to the system was from a DIY power supply unit.
- PCB artwork was developed using a CAD package and a double sided PCB fabricated using the toner-transfer method
- After population of the PCB with all electronic components it was tested standalone.
- The PCB was then fitted inside the enclosure and connected to the sockets, connectors, switches and LED's.
- This First-Unit was powered from an external PC SMPS and tested for all functionality.
- Minor changes needed to be carried out in hardware and software.
- The First-Unit design was frozen and the Hardware, User and Experimental documents prepared
- As an abundant precaution and to verify the repeatability and correctness of the documentation a Second-Unit was fabricated based on the documents.
- Tests on this system validated the development process and no changes were made
Warning & Disclaimer:
All content provided here is for informational purposes only. I make no representations as to the accuracy or completeness of any information. I will not be liable for any errors or omissions in this information. I will not be liable for any losses, injuries, or damages from the display or use of this information including software.
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