Introduction: VHDL Stopwatch
This is a tutorial on how to make a stopwatch using VHDL and a FPGA circuit board, like a Basys3 Atrix-7 Board. The stopwatch is able to count from 00.00 seconds to 99.99 seconds. It uses two buttons, one for the start/stop button and another for the reset button. The numbers are displayed on the board's seven-segment display using its anodes and cathodes. There are three different files needed in order to get this stopwatch to work.
Step 1: Hardware/Software
- Basys3 Atrix-7 FPGA Board
- Vivado Design Suite from Xilinx
- USB 2.0 A Male to Micro-B Male
Step 2: Block Diagram
The overall stopwatch has three inputs and two outputs. The three inputs are the start/stop, reset, and clock. The start/stop and the reset are buttons and the clock is the board's 100MHz clock. The two outputs are the anodes and cathodes for the seven-segment display.
The first module (clock divider) has one input and two outputs.The input is the board's 100MHz clock and the outputs are two separate clocks, one running at 480Hz and another running 0.5MHz.
The second module (display) has five inputs and two outputs. The inputs are the board's 100MHz clock, the two clocks from the clock divider module, and the start/stop and reset buttons. The outputs are the anodes and cathodes.
The last module (modeled by the entire block diagram) has three inputs and two outputs. This is the file that brings everything together. The inputs are the board's 100MHz and the start/stop and reset buttons. The outputs are the anodes and cathodes that control the seven-segment display. All of the inputs and outputs are physically on the board for the final module.
Step 3: State Diagram
The image above shows the state diagram for how the stopwatch works. Pressing the reset button has no affect on the state of the stopwatch. The next state is determined by the start/stop button. The start/stop is "HIGH" when pressed down, but not when its held down, and "LOW" when the button has rebounded back or being held down after being "HIGH" momentarily.
If the stopwatch is counting and the start/stop button goes "HIGH", then it stops counting. If the stopwatch is stopped and the start/stop button goes "HIGH" then it starts counting again. For both states, if the start/stop button is "LOW", then it will stay in the state that it is currently in.
Step 4: Clock Divider Module
The clock divider module has one input, the board's 100MHz clock, and two outputs, the 480Hz and the 0.5MHz clocks. The 480Hz clock is used to keep all of the LEDs on the seven-segment display "on" at the same time by switching through the four rapidly. The 0.5MHz clock is used for the stopwatch to actually count by centi-seconds.
Step 5: Display Module
This display module has five inputs, the board's 100MHz clock, the two clocks from the clock module, and the start/stop and reset buttons, and two outputs, the anodes and cathodes. This module also has the "logic" for how the stopwatch counts and incorporates the finite state machine.
Step 6: Binding Module
This final module is the one that brings the other two modules together. It has three input, the board's 100MHz clock and the start/stop and reset buttons, and two outputs, the anodes and cathodes. The 100MHz clock goes to the clock divider module and the display module, and the start/stop and reset buttons go to the display module. The outputs of the clock divider module (480Hz and 0.5MHz) go to the two clock inputs of the display module. The outputs of the display module (anodes and cathodes) go to the final module's outputs.
Step 7: Constraints
The two inputs can be any buttons on the Basys3 Atrix-7 FPGA Board and the outputs are going to be the four anodes and the eight cathodes (because you also want a decimal point between seconds and milliseconds) for the seven-segment display.
Step 8: Done!
Upload the program onto your Basys3 Atrix-7 FPGA Board and press your start/stop button to get the stopwatch going!
We have a be nice policy.
Please be positive and constructive.