Step 4: RAM Controller

Picture of RAM Controller
So, for our three 4-bit RAM modules, we have the design below. the input data is placed at the data bus, and then written to the memory ny pulsing the appropriate input high. the contents of each nibble canbe read as long as the appropriate read nibble is high. For my security system however i needed to automatically switch from one nibble to the next when a new digit was input by the user. for this i made a RAM controller. it de-multiplexes a single read and a single write signal to the appropriate nibble of ram, depending on the 2 bit address input.

The second picture shows my RAM controller. when a Rising edge is present at the clock of the first flip-flop, the counter counts up by one (as d is connected to NOT Q). for each pulse it counts up by one. when the counter output is 11, the output of the reset logic becomes high, making the reset inputs of the counter high. this makes the counter reset back to 00. the counter output controlls which output that the de-multiplexers are connected to. for example, if the counter output is 01 then the de-multiplexer would be connected to the output second from the top (where the arrow points in the diagram is allways the multiplexer state at 00). you no only have one read and one write input - plus the counter input. you could - if you dont mind the RAM allways reading its contents to the output except when writing make the Write input equal to 'NOT Read' with a not gate (or a NAND gate with both inputs tied together if you are using NAND logic)

Now we have the RAM controller we have got a fully functioning one and a half bytes of 4-bit RAM! imagine trying to make enough for a modern computer this way D: