CPE133 Digital Clock




Introduction: CPE133 Digital Clock

In this instructable, a digital alarm clock will be made using VHDL and the 7 segment display on a Basys3 board. The digital alarm clock will include features of telling time in real time and setting the time using buttons.

Step 1: Black Box Diagram

Always start by drawing a black box diagram.

Inputs :

clk_in ~ clock signal

btn_min0 ~ button to control first digit of minutes

btn_min1 ~ button to control second digit of minutes

btn_hour - button to control digits of hour


AN ~ 4 bit output used to control each anode of the 7-segment display

DISP ~ 7 bit output of cathodes used to display individual digits in each anode

LED_sec_blink ~ LED light that blinks every second

Step 2: Structural Diagram

VHDL source 1:

A clock divider which is basically a counter is used to slow down the clock to increment by 1 second. This is done by using a counter. The scaling factor for the clock divider is found by dividing the input frequency by the frequency you want. In this case, 100 mHz/ 1 Hz, but divided by two because the clock signal is toggled each half sequence. An led is also added to this clock to show increments of 1 second.

VHDL source 2:

All the clock logic is included in this source. In this case, a digital clock is basically a bunch of counters put together. Each digit of time can be considered a counter. I used seconds as a counter to know when to increment the first minute digit and then using that first minute digit counter to increment the second minute digit. The hours digits are also implemented the same way.

This source also includes the multiplexing of the anodes in the 7-segment display. A different clock divider is used in this source and it is used to display all the anodes at the same time to the human eye. Most logic in this source are if-else statements to display individual values.

Step 3: Clock Divider Source

Step 4: Clock Logic Source

Step 5: Main Module

Be the First to Share


    • Pocket-Sized Speed Challenge

      Pocket-Sized Speed Challenge
    • Audio Challenge 2020

      Audio Challenge 2020
    • Maps Challenge

      Maps Challenge

    2 Discussions


    Question 1 year ago

    What is the truth table of this project


    3 years ago

    Thanks for sharing!