If you have seen my other instructable on ram memory, you probably know that I used transistors to make a register. In this instructable I will show you how to make a register using CMOS gates.
If you haven't seen my other instructable, check it out https://www.instructables.com/id/DIY-RAM-Memory-Register-Style/
Step 1: What Is CMOS?
CMOS stands for Complementary Metal Oxide Semiconductors. Its a form of logic that uses very little current and requires no resistors. It uses MOSFETs in a complementary arrangement, so you use a P-channel and an N-channel MOSFET at one time. The cool thing about CMOS is that when one MOSFET is on, the other is off, so gates don't use very much current. Another thing about MOSFETs is that the gate is not connected in any way to the drain or source so it requires no resistor, unlike ordinary bipolar transistors.
Step 2: Why Use CMOS?
Now the question becomes, why use CMOS? The other circuit used half the number of transistors, and wasn't as complex. Well a reason for using CMOS is power consumption. The CMOS circuit uses less than 5 milliamps per bit maximum (when both switches are off and the LED is off, it uses less that a microamp). The other circuit used 15-25 milliamps per bit (depending on the switches and LEDs. Now let's put that into perspective, an 8-bit CMOS register would use less than 40 mA, but an 8-bit RTL (resistor-transistor logic) registe would use 120-200 mA!! Thats a huge difference.
Step 3: What You Will Need
There is a very simple parts list for this project:
***These are per-bit numbers***
8 2N7000 Small signal n-channel mosfet
8 BS250 Small signal p-channel mosfet
2 Pushbutton switches
2 10K ohm resistors
1 1K ohm resistor (or whatever value is needed for your LED)
***These are necessary no matter how many bits you make***
pliers (not necessary, but very very close)
Step 4: How It Works
This version uses a conventional Data Latch (D-Latch). Its basically a shortcut version of the Master-Slave D-Flip Flop. It uses 4 NAND gates to operate. When the clock goes high, the Q output will follow any changes from Data. When the Clock goes low again, the bit is latched. Now the Q output will not change states, even when Data does.
Step 5: The NAND Gate
A B Y
0 0 1
0 1 1
1 0 1
1 1 0
It requires 4 MOSFET to operate, 2 P-channels and 2 N-channels in the configuration below. The P-channel FETs are in parallel, but the N-channel FETs are stacked up, in a "Totem Pole" configuration. If either A or B is low, then current can flow through one of the the P-channel FETs, making Y logic 1. This is true to the truth table. If both A and B are high, then the P-channel FETs turn off and both N-channel FETs turn on, making Y logic 0. As true to the table.
Step 6: Building the Circuit
The complexity of this circuit is much greater than that of the last one, so I am not going to make a schematic for it. But don't fret, because you know how to arrange the MOSFETs to make a NAND gate, and you know how to connect the NAND gates together, so you can build it. To connect the switches, you need to tie the side of the switch connected to the first NAND gates to ground with a 10K ohm resistor. The other side of the switch can be tied directly to positive 5 volts.
Step 7: Finished It
I hope you did well with building this (if you attemped it) and you learned something new. This very stuff is in our computers, iPods, and Xboxs. These circuit may be impractical in their current state, but this is the exact same circuitry used in little tiny ICs!