Video Processing Using VHDL and a Zybo

Introduction: Video Processing Using VHDL and a Zybo

Spanish Engineer studying in Austria Love on building and making new electronic staff or prgrammi...

FPGAs are faster than CPUs to process, because they can make many calculations in parallel

Note: This project is still under construction and is going to be improved (as soon I have time). Meanwhile I am travelling the world.....

Step 1: Create a New Vivado Project

After opening Vivado, first you need to create a new project on your workspace you want to work in.

Later name your project and choose the project location.

Choose Zybo as a target board or another Zynq board you want to use.

Step 2: Create a Block Diagram With Basic

Add a new Zynq_Processing_system diagram.

Also add the IPs Dvi2rgb and rgb2vga

Additional to these blocks two constants are used to configure the HDMI port as a sink.

[Sorry, because of duplicate content this tutorial was removed from here... to the original ]

Step 3: Insert a VHDL Resource

The user block should be created, for that press ctrl+A or search to "add a new source" in the left panel.

Create a new file with VHDL and add to the diagram and then edit the VHDL code.

[Sorry, because of duplicate content this tutorial was removed from here... to the original website ]

Step 4: Add Additional Onboard Perifericals Like Leds, Buttons or Sliders (optional)

To add some sliders and leds for later possible use.

[Sorry, because of duplicate content this tutorial was removed from here... to the original website ]

Step 5: Now You Can Insert Your VHDL Code on the Application Block

Once added the VideoProcessing module, To edit te code, press. An example of a starting code is attached

[Sorry, because of duplicate content this tutorial was removed from here... to the original website ]

Step 6: Create a Wrap

Make a wrap before for the synthesis of the block diagramm.

Step 7: Synthesis, Implementation and Bitstream Generation

Add the constraints pin descriptions. It is attached.

run the synthesis. Later the implementation and then generate the bitstream, which is going to be loaded to the FPGA.

Step 8: Export Hardware and Launch SDK

Export the Hardware and launch SDK.

Step 9: Create a New Board Support Package and a New Application

Create a board support package. Then open or create an application using the template "hello word".

Then run the FPGA

Step 10: Program FPGA and Run the Hello World Code

This is only an small example, where the color channels are exchanged.


[Sorry, because of duplicate content this tutorial was removed from here... to the original website ]



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    9 Discussions

    Hello Dear sir

    I follow your project each step line by line.

    Now able to generate bitstream successfully and written hello world app in sdk

    and uploaded generated bit stream file in zybo board

    and also hello world app in debug mode

    serial port i had used as docklight

    and also i have configured zybo board with input taken from hdmi cable connected from

    laptop as source to sink into board and also connected VGA out as LCD screen as display unit. but i not able to get result

    please help me in this regards

    I have uploaded snaps

    WhatsApp Image 2018-07-24 at 2.43.09 PM (1).jpegWhatsApp Image 2018-07-24 at 2.43.07 PM (1).jpegWhatsApp Image 2018-07-24 at 2.43.08 PM (2).jpeg

    I have the following error could you help me out?
    [Shape Builder 18-119] Failed to create I/OLOGIC Route Through shape for instance design_1_i/dvi2rgb_0/U0/DataDecoders[1].DecoderX/InputSERDES_X/InputBuffer. Found overlapping instances within the shape: design_1_i/dvi2rgb_0/U0/DataDecoders[0].DecoderX/InputSERDES_X/InputBuffer and design_1_i/dvi2rgb_0/U0/DataDecoders[1].DecoderX/InputSERDES_X/InputBuffer.

    Thank you for the detailed instructions. I followed your instructions and successfully got it working.

    But there are some weird behavior that I can't understand well.

    Basically in SDK, to get it working I have to (1) program fpga -> (2) launch HelloWorld on hardware -> (3) then program fpga again. At this point, if I re-launch on hardware, it stopped working, i.e. VGA says no input signal. So I have to program fpga again to get it working.

    Do you see something similar? Do you have any idea why this is happening?
    My guess is that the dvi2vga IP needs some kind of reset/initialization that is done when programming fpga. But I can't quite figure it out.

    3 replies

    Can send me video file of setting up whole process. It's really helpful then to me. My email id is

    Hello Pkuwangh, I have no idea what could be! Hope you fix it!

    Yeah, I got it fixed by connecting a button to the aRst signal.

    Hey, this is an interesting project. I recently did some similar projects and am curious if you have any input on them.

    One of them is just a potential C++ Vivado HLS replacement for the VHDL processing block in your design (though with an AXI-Video Stream based architecture instead):

    The other is a project that uses a camera often used with Arduinos and does video processing with that (it actually uses that first project):

    Also, you should be able to take the whole SDK part out of this project by using the System Clock on the ZYBO PL (As stated on the Digilent website ZYBO reference manual: "The ZYBO provides an external 125 MHz reference clock directly to pin L16 of the PL"). Used with the clocking wizard IP you can easily generate a 200MHz clock without needing the PS.

    Interesting. I had never heard of this board before. I am going to have to look into it. It looks like it might be pretty useful.

    1 reply

    Yes, it is! I started to use only some month ago it is really powerful. Digilent have also some other nice similar boards depending on your needs. Regards