Getting the PmodOLEDrgb to Work on Zybo

Here at Digilent, we have been working hard on making an easy to use Pmod interface for your Digilent boards. Follow this guide to learn how to install the IP library and board files needed to get it to work.

Step 1: Downloads

Digilent board files - Contains board pin definitions for several Digilent boards including ZYBO

Digilent IP library- Contains several IPs designed to work with Digilent hardware.

Both of these libraries are stored in Digilent's Github, and are updated regularly, so cloning the repositories and syncing them from time to time will keep you up to date on the latest drivers.

Make sure you have the latest version of Vivado with Xilinx SDK installed before continuing.

Step 2: Install Board Files

Extract vivado-boards and copy the contents of new/board_files into

C:/Xilinx/Vivado/2015.4/data/boards/board_files

Alternatively, you can create a small tcl script in the Xilinx appdata folder. You can find this by typing %appdata% and pressing enter in windows search. Once in the Roaming folder, go into Xilinx/Vivado. Create a new text file in this folder called init.tcl. Copy and paste the following line and save it

set_param board.repoPaths [list "C:/[path to vivado-boards/new]"]

This will install the board files for all versions of Vivado.

Step 3: Open Vivado and Create a Project

Open Vivado and create a new project. You do not need to include any existing sources or IPs, but make sure to choose the Zybo on the part selection page. If it does not show up, your board files are not installed properly.

Step 4: Add the Digilent IP Repo

If you haven't already, extract the vivado-library folder.

Inside of your new project in Vivado, click on Project Settings, found on the left beneath Project Manager. Click on IP and select the Repository Manager tab. Click the + and navigate to the extracted vivado-library folder and select it before pressing OK.

Step 5: Create a New Block Design and Add Your Blocks

On the left, under IP Integrator, click Create Block Design. Name it whatever you like, as long as there are no spaces. Click the little yellow Add IP button seen in the middle of your new design. Find the ZYNQ7 Processing System and add it to your design.

On the left of your design, click on the Board tab. Double click the Pmod connector that you want the PmodOLEDrgb to connect to. Select the PmodOLEDrgb_v1.0 IP and click OK.

Click Run Block Automation and click OK to run block automation for the Zynq processor. Then click Run Connection Automation select All Automation and click OK to connect the PmodOLEDrgb component.

Step 6: Add a SPI Clock

Double click the ZYNQ block to open its settings. Click Clock Configuration, expand the PL Fabric Clocks dropdown and check the second box. Click OK.

Connect the FCLK_CLK1 output on the Zynq block to the ext_spi_clk input on the PmodOLEDrgb block.

Step 7: Create a Wrapper and Generate Bitstream

Click the Sources tab on the left of your block design. Right click your design and click Create HDL Wrapper... and let Vivado auto manage to make an HDL wrapper for your block design. Then click the Generate Bitstream button found below Program and Debug. Click Yes when it prompts you that there are no implementation results. Wait a few minutes for it to finish.

Step 8: Move to Xilinx SDK

When it is finished, click File>Export>Export Hardware and click the Include bitstream box before clicking OK. Then click File>Launch SDK and click OK to open the project in Xilinx SDK.

Step 9: Create a New Application Project and Import Examples

In Xilinx SDK, click the little down arrow next to New (beneath File) and select Application Project. Name it "PmodOLEDrgb" and click Next. Select Empty Application in the list of Available Templates and click Finish. In your project explorer on the left, you should see 2 new folders show up: PmodOLEDrgb and PmodOLEDrgb_bsp. The _bsp folder includes hardware drivers for the Zynq system, while the other will hold your program files.

Expand the _wrapper_hw_platform_0 folder and navigate to drivers/PmodOLEDrgb_v1_0/examples/

Copy main.c and bitmap.h into your PmodOLEDrgb/src folder.

Step 10: Program the FPGA and Run the Program

On the top toolbar, click Xilinx Tools>Program FPGA. Click Program to program the FPGA.

Next click the Run As... button (Green with an arrow in it) and click Launch on Hardware (System Debugger) to program main.c onto your Zybo!

You should see the Snake bitmaps write to the PmodOLEDrgb screen in rapid succession.

For more information on creating a byte array to display on the PmodOLEDrgb, check out my instructable on getting the PmodOLEDrgb working on a chipKITPro Mx7.