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**UPDATE** I also made a CMOS version here: http://www.instructables.com/id/DIY-CMOS-RAM-Memory/
If you have ever looked at a microcontroller's datasheet, you have probably seen something about registers. Registers are little one or two byte memory storage units in microcontrollers. The register in this instructable can hold 3 bits of data (b/c I ran out of room on my breadboards) using transistors. I did this to prove that I can, however, its not practical as an 8 bit register requires 64 transistors, about 64 resistors and lots of space.
The register is a neat device. It can recieve data when the enable input is, in my circuit, low and it can then latch and save the data even it the data line is changing. My circuit is not the conventional D-type latch because it used more transistors than I had.
If you have ever looked at a microcontroller's datasheet, you have probably seen something about registers. Registers are little one or two byte memory storage units in microcontrollers. The register in this instructable can hold 3 bits of data (b/c I ran out of room on my breadboards) using transistors. I did this to prove that I can, however, its not practical as an 8 bit register requires 64 transistors, about 64 resistors and lots of space.
The register is a neat device. It can recieve data when the enable input is, in my circuit, low and it can then latch and save the data even it the data line is changing. My circuit is not the conventional D-type latch because it used more transistors than I had.
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Signing UpStep 1Materials
The materials for this project are quite simple as it is a prototype kind of project.
8 NPN transistors for each bit - mine is 3 bits (do the math)
8 resistors for each bit - 1K for the supply connection and 1K or more for signal. get a few more (you will need some more)
A pushbutton switch - N.O.
A DIP switch - at least 4 switches
A solderless breadboard - if you dont have one then your missing out because these things are great
An LED for each register to display the stored bit
Some wire
Pliers are a great help for placing wires in tight places
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i have about 50
here is the schematic.
The circuitry itself draws anywhere from 1 mA to 2 mA depending on the state of the data input. If the data input is HIGH, the circuitry will draw 1 mA more compared to when the data input is LOW
The most this will draw is 7 mA.
The least this will draw is 1 mA.
Inst'ables.com is not allowing me to post pics in comments right now, so I'll just post some links to them:
http://i137.photobucket.com/albums/q208/rtty_the_pivot/100_9730.jpg
http://i137.photobucket.com/albums/q208/rtty_the_pivot/100_9731.jpg
http://i137.photobucket.com/albums/q208/rtty_the_pivot/100_9730.jpg
can i store it
if yes how
am i correct
how can you store data in it
When i say "pulse the 'latch' input", I mean turn it on and then turn it off.
i am trying this
i have about 50 bc548s
Inst'ables.com is not allowing me to post pics in comments right now, so I'll just post some links to them:
http://i137.photobucket.com/albums/q208/rtty_the_pivot/100_9730.jpg
http://i137.photobucket.com/albums/q208/rtty_the_pivot/100_9731.jpg
http://i137.photobucket.com/albums/q208/rtty_the_pivot/100_9730.jpg
===http://i137.photobucket.com/albums/q208/rtty_the_pivot/ANDgate.png===
I suggest R1 and R2 to have a value of anywhere between 10 Kohm and 100 Kohm.
R3's value has to be less than R2. preferably half the value of R2.
The reason for the addition of R3 into the gate is to keep the base-emitter leakage in check. If I make input B HIGH, that high current will go through the base and out the emitter of the transistor. This current will ultimately end up at the output (X) of the gate. The LOW current coming through R3 is going to be double the HIGH current of R2 if the value of R2 is double R3.
From this we can see that the LOW current from R3 and the HIGH current from R2 will both meet once they have gone out the emitter of the transistor. Now that they have met, the signal with more current will take over. Since the LOW signal from R3 is double the current of the HIGH signal from R2, the output will be LOW.Alternately, When A is HIGH, it allows a HIGH signal with much more current than the R3 LOW signal to "take over" the emitter as the dominant state, and the end result being a HIGH output (X).
=====thanks for reading!=====
If you were to use CMOS or true TTL, then the AND gate would work normally, but with RTL, it doesn't work right.
This ensures that even if B is HIGH while A is LOW, the HIGH current given to B will not be more than the LOW current from pull-down resistor. (remember that the current given to the base and collector both go to the emitter)
The current best solution I've found is to make a NAND gate, and invert the output. But if that circuit works for you, then go for it!
Good chat.
D = 1
WE = 1
Q will = 1
THEN
D = 0;
WE = 0
Q will = 1 because when R & S = 0 , Q = 1
BUT
D = 0
WE = 1
Q will = 0
THEN
D = 1;
WE = 0;
Q will = 1 because when R & S = 0, Q = 1
Or have I gone wrong somewhere ?
When:
D = 1,
WE = 0,
Then:
R = 0,
S = 1,
Q = 1
When:
D = 1,
WE = 1,
Then:
R = last state,
S = last state,
Q = last state
When:
D = 0,
WE = 0,
Then:
R = 1,
S = 0,
Q = 0
When:
D = 0,
WE = 1,
Then:
R = last state,
S = last state,
Q = last state.
When R & S are 0, then Q becomes latched on the last signal input. Remember also that the WE does NOT make the signal 1 when its 1, it lets the data signal pass, so it the data is 0 then the output of the gated buffer is 0.
I hope that this clarified things for you :)