Introduction: 2 Stage Amplifiers
Amplifier has a wide range of applications in real life devices such as Audio Amplifiers in your electric guitar, Analog to Digital Converters in your cell phone's communication network, hearing aids and many more. In this project a basic understanding of CE amplifier design and the gain and bandwidth dependencies are covered upon.
Step 1: DC Biasing of Common Emitter Configuration
The purpose of biasing a circuit is to establish a proper stable dc operating point (Q-point). The dc operating point between saturation and cutoff is called the Q-point. The goal is to set the Q-point such that that it does not go into saturation or cutoff when an ac signal is applied.
Voltage-divider bias is the most widely used type of bias circuit. Only one power supply is needed and voltage-divider is more stable(Beta independent) than other bias types.
Dc bias voltage at base of transistor is developed by a resistive voltage-divider consists of R1 and R2.
Conditions to follow for a good biasing:
1. To Reduce the dependency of load resistance(RL) on gain take Rc << RL#
2. Try to bias the point close to the middle of the load line. Take Ve < 0.1Vc and try to obtain Vc ≈ 0.5Vcc.
3. For a stable voltage divider bias, try to make R1 || R2 <<β (Re + re)#, where re= Vt / Ic (Vt thermal voltage* =26 mV)
4.Assume Ic=Ie, so Re=Ve/Ic.
β can be measured using a multi-meter or using β meter (http://bit.ly/2HR6qAI)
*thermal voltage: http://bit.ly/2TX7O9M
# 0.1 times is good enough .This approximation is generally taken for similar approximations
All the resistances in the circuit can be calculated using these conditions although for practical purposes you might need to shift the Q point by changing Rc and Re values.
Step 2: Bandwidth Parameters
The frequency response or the AC sweep shows the bandwidth of the amplifier. It is the Range of frequency in which amplifier has a constant gain, the gain starts falling on both low and high frequencies, the bounderies (cutt-off) of bandwidth are defined by the frequency at which there a 70% gain of the actual midband gain(-3dB).
Conditions to follow to set the lower cutt-off frequency:
Zc<< Rc(Zc=1/2πfC : impedence offered by capacitor at frequency f ,
Rc= Thevnin Resistance across Capacitor C)
Example: If you are to design an amplifier with band 20Hz- 20Khz f taken should be lower band frequency ie., 20Hz.
Use the condition to get values of capacitances.
Step 3: 1st Stage CE Amplifier
A single stage common emitter configuration as shown in the image gives a gain of 24 for a load resistance (R3) of about 280 omhs.
The gain of the circuit is given by Av=Rc || RL / re You may have to add swamping resistance (R7) to reduce distortion in the output and increase input resistance.
re is a function of Ic this will distort the gain(different gain value for different inputs) so to keep Av idependent of input we take swamping R7>>re.
New Gain formula is Av=Rc || RL / re + R7.
Step 4: A 2 Stage Amplifier Design
Two such single stage stage amplifiers are connected to in order to increase the gain tremendously.
The only unknown is the RL for the Q1 part of CE network. Here RL will the impedence seen from C1 to the right, which is given by RL'=R3 || R4 || β(re+R9).
Step 5: Transient State Plots
Green: output of first stage
Blue: output of second stage