Introduction: BASYS-3 Flow Metering ANALOG TO DIGITAL Using Vhdl and the XADC

I've created this tutorial to help anyone who wants to learn about, or may be struggling with the Xilinx xADC, The example here refers to a Flow metering system of which we will not actually build, but we will demonstrate via simple electronics. This tutorial is part or my class project. The class is a digital design class in which we learned all sorts of different useful information in order to build different types of digital circuits, or program an FPGA. This tutorial assumes you understand how to use vhdl or at least verilog and you're somewhat familiar with the Vivado design suit or a similar IDE. The idea behind my class project was a water flow meter that can be used to measure the inline flow of any water Outlet. The idea was to build something that could be easily installed in line, on a faucet, or shower, or garden hose, or sprinkler system, that would informed owner of the usage or flow of that outlet.
I will include all of the source code and manuals needed to create the same project. The "instructee", that's you, will need a basys-3 board and some other simple Electronics like a bread board, some variable resistors (2x 10K ohm) and some jumper wires (4) to get started. This design may work on other boards like the Zybo, with a different Master XDC file. Enjoy!

Step 1: Get Famillure With Your Manuals

All the information you could need to build this project outside of knowing vhdl and being familiar with programming/cad coding the basys 3, you can find here. I've included it for further reference or curiosity. Happy digging!

Step 2: My Files.

You'll have to either follow my examples from the videos, or use what I have here and modify them to your liking (if needed).

The first file is the main entity, it uses all the other files to build it's process.

The second file controls LEDs to create a bar meter for a visual representation of your ADC (analog to digital converter) signal

The third file takes a clock signal that is generated on board the Basys-3, and slows it down for more a manageable signal for use with a "buffer" or "data hold/pass delay".

The fourth file is a borrowed/provided file, it is a seven segment, four digit (of which we only use 3), display driver. This takes the 8 bit output from the "hold delay" and decodes it from binary to a visible decimal readout on the basys-3 board.

The fifth file is the x_ADC. I also show you how to include this IP (xilinx Intellectual Property) block to the project via the IP catalog.

The sixth file is the Basys-3 Master_XDC file. this file includes all the mapping for the different IO on the Basys-3 board.

Step 3: Follow the Videos

All the information you need, provided you've familiar with Vivado and VHDL, is included in these videos. They'll give you a understanding of how the system works and how the code/cad works.

The first video is demonstrating how the project works on the board.

The second video shows what's going on in the main block of cad/code.

The third video shows and explains the individual component of the system.

The fourth item is an image depicting the circuitry used to create our 1 volt differential RESISTOR 1 was set to about 7 thousand ohms, and RESISTOR 2 was set to about 30 thousand ohms. Resistor 2's range should be the only one modified after the circuit is hooked up, It should be operated in the range of 0 ohms to 3 thousand ohms. There's more explanation in the first video.