Esp8266 Clock and Pulse Generator

Introduction: Esp8266 Clock and Pulse Generator

This instructable is for a simple piece of test equipment; a clock and pulse generator.

It uses the i2S hardware interface on an esp8266 to generate a test clock or a pulse sequence. This makes it easy to put together as no special hardware is required for a basic system.

  • Clock generation from 2Hz to 20MHz
  • Any frequency may be used
  • Searches for best match of clock dividers and bit length from 160MHz base clock
  • Typically better than 0.1% match for frequencies < 100KHz
  • Mark space ratio selection
  • Frequency matching tolerance may be relaxed to get better mark space handling
  • Pulse train generation based on definitions in files
  • Web based GUI allowing control from PC, phone, tablet
  • Wifi Management to allow easy initial router set up
  • OTA software update
  • Uses a special I2s library (i2sTXcircular) giving flexible control

Step 1: Hardware

I constructed mine in a 3d printed enclosure holding a 18650 battery with a USB charger, an on/off switch, an a 3 pin header plug for the output signal. https://www.thingiverse.com/thing:4663480

The enclosure has a narrow slot for holding the electronics next to the battery.

The signal comes out of the GPIO3 pin (RX). This can be used directly but for higher drive capability I chose to include a little buffer using a 74LVC2G34. I paralleled the two buffers in this device to provide even more drive capability.

Everything is done just in the software in the device, and control is done by providing a web server so that a browser on a PC, phone or tablet provides full control.

Step 2: Software

To build and set up the software use the code at https://github.com/roberttidey/espI2sClockGen

  • Install i2sTXcircular library (included)
  • Install BaseSupport library (https://github.com/roberttidey/BaseSupport)
  • Add WifiManager library
  • Edit passwords in BaseConfig.h
  • Compile and upload in Arduino environment
  • Set up wifi network management by connecting to AP and browsing to 192.168.4.1
  • upload basic set of files from data folder using STA ip/upload
  • further uploads can then be done using ip/edit - normal interface is at ip/

How it works

The i2sTXcircular library allows building a circular chain of buffers which are then output automatically by the i2S hardware on the esp8266 using DMA so that no software overhead is used once it is going.

The basic clock on the device is 160MHz which is divided down by a pair of dividers. The output signal is then determined by what data is put into the buffers which is output by the divided down clock. By choosing the two dividers and by using potentially multiple data bits to represent each pulse then a frequency can be approximated quite closely. It also allows the duty cycle (mark/space ratio of clock pulses) to be varied.

The browser javascript code tries to optimise the choice of parameters to give a close match to any selected frequency.

Although the main purpose is for generating clocks it is also possible to produce more complex pulse trains by putting a definition into a pulse file which then controls the data which will be generated and put into the circular buffer. Details are in the example pulse files included.

Step 3: Operation

Operation is controlled by the browser interface shown in the main image.

For normal clock generation you just select the target clock and the mark space % ratio. The actual clock achieved and its error are displayed. When the Generate Clock button is pressed then the parameters are sent to the device and clock generation using these parameters starts.

By clicking on the Advanced bar more details can be seen.

The bit clock shows the sub-multiple of 160MHz which is being used.

Mark and space bits show how many bits are being used to represent marks and spaces.

Div1 and Div2 show the two dividers which have been chosen to generate the nearest bit clock.

Normally the two dividers are chosen to give the nearest match to the chosen frequency and to maximise the number of data bits used which helps with providing more flexibility in allowing different duty cycles. However, sometimes the best match results in a low bit count leaving little room for changing the duty cycle. By changing the tolerance % value the dividers will be chosen to give a frequency within this tolerance but with potentially more data bits used. Try for example setting tolerance to 0.5 or 1.

You can also set the Bits per word number to control choice of parameters. 0 (default) means choose any bits per word. A single number (e.g. 24) means only choose parameters that match this. You can also put in a range (e.g. 24,31). This only works for target Hz above 10KHz, below this scaling will take effect so that the number get multiplied up.

The buffer size shows the total buffer spaced used in 32 bit words. This is chosen to ensure the clock pulse form a perfect circular fit into the buffer. Internally this buffer is split into a number of smalle rbuffers to allow the chained DMA to function.

For pulses operation choose the pulses TAB. This shows the available pulse files and a button next to each one which will produce a pulse train based on its definition. You can see the contents of the file by clicking on its link. More pulse files can be uploaded using the ip/edit file browser. They should start with the name pulse.

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