## Introduction: How to Design and Implement a Single-phase Inverter

This Instructable explores the use of Dialog’s GreenPAK™ CMICs in power electronics applications and will demonstrate the implementation of a single-phase inverter using various control methodologies. Different parameters are used to determine the quality of the single-phase inverter. An important parameter is Total Harmonic Distortion (THD). THD is a measurement of the harmonic distortion in a signal and is defined as the ratio of the sum of the powers of all harmonic components to the power of the fundamental frequency.

Below we described steps needed understand how the solution has been programmed to create the single-phase inverter. However, if you just want to get the result of programming, download GreenPAK software to view the already completed GreenPAK Design File. Plug the GreenPAK Development Kit to your computer and hit program to create the single-phase inverter.

## Step 1: Single-phase Inverter

A power inverter, or inverter, is an electronic device or circuitry that changes direct current (DC) into alternating current (AC). Depending upon the number of phases of the AC output, there are several types of inverters.

● Single-phase inverters

● Three-phase inverters

DC is the unidirectional flow of electric charge. If a constant voltage is applied across a purely resistive circuit, it results in a constant current. Comparatively, with AC, the flow of electric current periodically reverses polarity. The most typical AC waveform is a sine wave, but it can also be a triangular or square wave. In order to transfer electrical power with different current profiles, special devices are required. Devices that convert AC into DC are known as rectifiers and devices that convert DC into AC are known as inverters.

## Step 2: Topologies of Single-phase Inverter

There are two main topologies of single-phase inverters; half-bridge and full-bridge topologies. This application note focusses on the full-bridge topology, since it provides double the output voltage compared to the half-bridge topology.

## Step 3: Full-bridge Topology

In a full-bridge topology 4 switches are needed, since the alternating output voltage is obtained by the difference between two branches of switching cells. The output voltage is obtained by intelligently switching the transistors on and off at particular time instants. There are four different states depending upon which switches are closed. The table below summarizes the states and output voltage based on which switches are closed.

To maximize the output voltage, the fundamental component of the input voltage on each branch must be 180º out of phase. The semiconductors of each branch are complementary in performance, which is to say when one is conducting the other is cut-off and vice versa. This topology is the most widely used for inverters. The diagram in Figure 1 shows the circuit of a full-bridge topology for a singlephase inverter.

## Step 4: Insulated Gate Bipolar Transistor

The Insulated Gate Bipolar Transistor (IGBT) is like a MOSFET with the addition of a third PNjunction. This allows voltage-based control, like a MOSFET, but with output characteristics like a BJT regarding high loads and low saturation voltage.

Four main regions can be observed on its static behavior.

● Avalanche Region

● Saturation Region

● Cut Area

● Active Region

The avalanche region is the area when a voltage below breakdown voltage is applied, resulting in the destruction of the IGBT. The cut area includes values from breakdown voltage up to threshold voltage, wherein the IGBT doesn’t conduct. In the saturation region, the IGBT behaves as a dependent voltage source and a series resistance. With low variations of voltage, high amplification of current can be achieved. This area is the most desirable for operation. If the voltage is augmented, the IGBT enters the active region, and current remains constant. There is a maximum voltage applied for the IGBT to ensure it won’t enter the avalanche region. This is one of the most used semiconductors in power electronics, since it can support a wide range of voltages from a few volts to kV and powers between kW and MW.

These Insulated Gate Bipolar Transistors act as switching devices for the full-bridge single-phase inverter topology.

## Step 5: Pulse Width Modulation Block in GreenPAK

The Pulse Width Modulation (PWM) Block is a useful block that can be used for a wide range of applications. The DCMP/PWM Block can be configured as a PWM Block. The PWM block can be sourced through FSM0 and FSM1. PWM IN+ pin is connected to FSM0 whereas IN- pin is connected to FSM1. Both FSM0 and FSM1 provides 8-bit data to PWM Block. PWM time period is defined by the time period of FSM1. The duty cycle for the PWM block is controlled by the FSM0.

𝑂𝑢𝑡𝑝𝑢𝑡 𝐷𝑢𝑡𝑦 𝐶𝑦𝑐𝑙𝑒 = 𝐼𝑁+ / 256

There are two options for the duty cycle configuration:

● 0-99.6%: DC ranges from 0% to 99.6% and is determined as IN+/256.

● 0.39-100%: DC ranges from 0.39% to 100% and is determined as (IN+ + 1)/256.

## Step 6: GreenPAK Design for PWM Based Square Wave Implementation

There are different control methodologies that can be used to implement a single-phase inverter. One such control strategy includes a PWM-based square wave for the single-phase inverter.

A GreenPAK CMIC is used to generate periodic switching patterns in order to conveniently convert DC into AC. The DC voltages are fed from the battery and the output obtained from the inverter can be used to supply the AC load. For the purpose of this application note the AC frequency has been set to 50Hz, a common household power frequency in many parts of the world. Correspondingly, the period is 20ms.

The switching pattern that must be generated by GreenPAK for SW1 and SW4 is shown in Figure 3.

The switching pattern for SW2 and SW3 is shown in Figure 4

The above switching patterns can be conveniently produced using a PWM block. The PWM time period is set by the time period of FSM1. The time period for FSM1 must be set to 20ms corresponding to 50Hz frequency. The duty cycle for the PWM block is controlled by the data sourced from FSM0. In order to generate the 50% duty cycle, the FSM0 counter value is set to be 128.

The corresponding GreenPAK Design is shown in Figure 5.

## Step 7: Disadvantage of Square Wave Control Strategy

Using the square wave control strategy causes the inverter to produce a large amount of harmonics. Apart from the fundamental frequency, square wave inverters have odd frequency components. These harmonics cause machine flux to be saturated, thus leading to poor performance of the machine, sometimes even damaging the hardware. Hence, the THD produced by these types of inverters is very large. In order to overcome this problem another control strategy known as Quasi- Square Wave can be employed to significantly reduce the amount of harmonics produced by the inverter.

## Step 8: GreenPAK Design for PWM Based Quasi-Square Wave Implementation

In Quasi-square wave control strategy, a zero output voltage is introduced which can significantly reduce the harmonics present in the conventional square waveform. Major advantages of using a Quasi-square wave inverter include:

● Amplitude of the fundamental component can be controlled (by controlling α)

● Certain harmonic contents can be eliminated (also by controlling α)

The amplitude of the fundamental component can be controlled by controlling the value of α as shown in Formula 1.

The nth harmonic can be eliminated if its amplitude is made zero. For example, the amplitude of the third harmonic (n=3) is zero when α = 30° (Formula 2).

The GreenPAK Design for Implementing the Quasi- Square Wave control strategy is shown in Figure 9.

The PWM block is used to generate a square waveform with 50 % duty cycle. The zero output voltage is introduced by delaying the voltage appearing across output Pin-15. The P-DLY1 block is configured to detect the rising edge of the waveform. P-DLY1 will periodically detect the rising edge after each period and trigger the DLY-3 block, which produces a delay of 2ms before clocking the VDD across a D-flip flop to enable the Pin-15 output.

Pin-15 can cause both SW1 and SW4 to turn on. When this occurs, a positive voltage will appear across the load.

The P-DLY1 rising edge detection mechanism also activates the DLY-7 block, which after 8ms resets the D-flip flop and 0 V appears across the output.

DLY-8 and DLY-9 are also triggered from the same rising edge. DLY-8 produces a delay of 10ms and triggers DLY-3 again, which after 2ms will clock the DFF causing a logical high across the two AND gates.

At this point Out+ from the PWM block becomes 0, since the duty cycle of the block was configured to be 50 %. Out- will appear across Pin-16 causing the SW2 and SW3 to turn on, producing an alternating voltage across the load. After 18ms DLY-9 will reset the DFF and 0V will appear across the Pin-16 and the periodic cycle continues to output an AC signal.

The configuration for different GreenPAK blocks are shown in Figures 10-14.

## Step 9: Results

12 V DC voltage is supplied from the battery to the inverter. The inverter converts this voltage into an AC waveform. The output from the inverter is fed to a step-up transformer which converts 12 V AC Voltage into 220 V which can be used to drive the AC loads.

Conclusion

In this Instructable, we have implemented a Single-Phase Inverter using Square Wave and Quasi Square Wave control strategies using GreenPAK a CMIC. GreenPAK CMICs act as a convenient substitute of Micro Controllers and analog circuitry that is conventionally used to implement a Single-phase inverter. Furthermore, GreenPAK CMICs have potential in the design of Three Phase Inverters.