Introduction: How to Convert From UCF to XDC File

With the release of Xilinx Vivado a while ago, many people are looking for reference designs, but only finding them for use with ISE. Luckily as long as there are no IP's, transferring a design is pretty straight forward. All you need to do is load the same .v or .vhd files and transfer the UCF file to a XDC file.

However if you've never worked with a constraints file before, this can be a little tricky. So I decided to write a guide. For some background information on constraints files check out this blog post.

In this instructable I will cover first how to change UCF to XDC for the same board, and then how to change from UCF to XDC for different boards. My example will be from Nexys 4 DDR UCF to Nexys 4 DDR XDC, and from Nexys 4 DDR UCF to Basys 3 XDC.

That way you'll be covered whether you are changing files because of a software change or changing files because of a hardware change.

To follow along in this tutorial you will need the demo UCF (the UCF file we are trying to convert), and the Nexys 4 DDR master XDC and the Basys 3 master XDC which you can find on the Nexys 4 DDR and Basys 3 product pages, respectively.

Attachments

Step 1: Find All Nets in Use

The first thing you need to do is find all of the nets that are in use. The easiest way to do this is to find all of the un-commented lines in the UCF file. An un-commented line is one that has no # sign in front of it.

Un-commented line:

NET "CLK" LOC = "E3" | IOSTANDARD = "LVCMOS33";

Commented line:

#NET "clk100mhz" TNM_NET = sys_clk_pin;

Take note of these nets, so you can ensure you add them all to the XDC file. Also take note of what they are physically connected to. Are they connected to LEDs, switches, buttons, pmod connector, clock signal.

In the example UCF file provided you should have the following nets in use:

NET "CLK"

NET "D<0>"
NET "D<1>"

NET "D<2>"

NET "D<3>"

NET "D<4>"

NET "D<5>"

NET "D<6>"

NET "D<7>"

NET "RST"

NET "Q<0>"

NET "Q<1>"

NET "Q<2>"

NET "Q<3>"

NET "Q<4>"

NET "Q<5>"

NET "Q<6>"

NET "Q<7>"

These nets correspond to:

A clock signal

8 switches

a button

and 8 LEDs

Step 2: Find Matching Components in the New XDC - Same Board

If you are switching the XDC file to a different board, for example Nexys 4 DDR to Basys 3, you can go on to the next step.

The next thing you need to do is find the components you need on the XDC file of the new board. The easiest way to do this is to use the master XDC file for that new board.

The master XDC file breaks up the lines into sections based on what components they are. In this example, you will need to find the clock, switches, buttons, and LEDs. In the Nexys 4 DDR master XDC these sections are at lines, 6, 11, 80, and 31, respectively. They are also shown above.

Step 3: Change Net Names of Matching Components in the New XDC - Same Board

If you are switching the XDC file to a different board, for example Nexys 4 DDR to Basys 3, you can go on to the next step.

Next you will need to change the names of those matching components in the master XDC file, to the net names that we noted in the step before last. The image shows the switches as an example. The first 8 switches are the switches we needed, so those are the ones with the names changed.

Make sure to change everything that was noted. In this example that is the clock, switches, button, and LEDs

Step 4: Find Matching Components in the New XDC - Different Board

If you are switching the XDC file to the same board, for example Nexys 4 DDR UCF to Nexys 4 DDR XDC, you can go on to the next step.

There are some considerations you have to make when switching boards. Some of the components may not port over nicely. For example the clock signal frequency may change, the button positions may not be in the same place, it may not have the same number of switches, LEDs or seven segment displays, and the ports or memory may not be the same. Watch out for these types of things when porting to a new board.

For the example of Nexys 4 DDR to Basys 3 there aren't any of these considerations you have to worry about. Find each of the components that were listed as needing to be changed. In the master XDC file each of the sections is labelled as to what the components are. You will need to find the clock, switched, buttons, and LEDs.

They are also shown in the above image.

Step 5: Change Net Names of Matching Components in the New XDC - Different Board

If you are switching the XDC file to the same board, for example Nexys 4 DDR to Nexys 4 DDR, you can go on to the next step.

Next you will need to change the net names of the components found in the previous step to the net names listed as needing to be ported. The image above shows the switches as an example. repeat for each component.

Step 6: Continue for All Components

Change all of the net names for each component. In the end you should have all the nets that we listed in a previous step. I'll list them again below:

NET "CLK"

NET "D<0>"

NET "D<1>"

NET "D<2>"

NET "D<3>"

NET "D<4>"

NET "D<5>"

NET "D<6>"

NET "D<7>"

NET "RST"

NET "Q<0>"

NET "Q<1>"

NET "Q<2>"

NET "Q<3>"

NET "Q<4>"

NET "Q<5>"

NET "Q<6>"

NET "Q<7>"

These nets correspond to: A clock signal 8 switches a button and 8 LEDs

Step 7: Load the .V or .VHD Files and the New XDC File Into Vivado

Create a new project in Vivado and load the new XDC files into the Constraints section of the Project Manager, by right clicking on constraints and selecting add new sources.

If you were using an existing Vivado project and just switching boards you can add the new XDC file to the existing project.

If not you will also need to add the .V and .VHD files.

I've also attached my final XDC files for both the Basys 3 and Nexys 4 DDR to this step.

Now that you know how to update projects for Vivado, go check out any of the FPGA projects on the Digilent Wiki.