NOT, AND, OR Gates Using NAND Gates

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Introduction: NOT, AND, OR Gates Using NAND Gates

About: Moving fast and breaking things!

In this instructable, we are going to construct NOT, AND, OR gates using NAND gates only. In the next steps, we will get into boolean algebra and we will derive the NAND-based configurations for the desired gates.

NAND and NOR gates are "universal" gates, and thus any boolean function can be constructed using either NAND or NOR gates only.

Here are two links for the instructables covering the fundamentals of digital logic gates:

1. Digital Logic Gates (Part 1)

2. Digital Logic Gates (Part 2)

Please feel free to post any questions regarding this instructable in the comments section below. Enjoy!

Step 1: Boolean Algebra

Boolean algebra is a branch of mathematical logic, where the variables are either true (1) or false (0).

In order to construct NOT, AND, OR gates from NAND gates only, we need to be familiar with the following boolean algebra laws:

1. Involution Law

2. Idempotency (Idempotent) law

3. DeMorgan's Law

The three laws are explained in Figure 1.

Also, we are going to use the 74LS00 IC chip to construct the derived NAND-based configurations on a breadboard in order to confirm the results. Note that Pin #7 is connected ground, and Pin #14 is connected to the supply voltage (5V).

Parts needed:
Breadboard

9V battery

Battery connector

5V regulator

IC Chip: 74LS00

One LED (any color)

One 330 Ohm resistor

Wires as needed

Step 2: NOT Gate

The NAND-based derivation of the NOT gate is shown in Figure 1. Also, it is important to note that the inputs of the NAND gates are connected together; the same input. In Figure 2 & 3, the NAND-based configuration was derived, the two possible inputs, zero and one, were tested, and the results were observed. Thus, from the results, we can conclude that inserting the same input through a 2-input NAND gate will result in the compliment of the input; logical negation is implemented which agrees to the truth table of a NOT gate shown in Figure 4.

Step 3: AND Gate

The NAND-based derivation of the AND gate is shown in Figure 1. For the breadboard part of this step, the blue wire represents Input 1 (A), wire 2 represents Input 2 (B), and the LED represents the final output. Finally, from the results, we can conclude that the derived configuration of the NAND gates is correct and indeed is equivalent to an AND gate because the results agree with the truth table of the AND gate shown in Figure 6.

Step 4: OR Gate

The NAND-based derivation of the OR gate is shown in Figure 1. For the breadboard part of this step, the blue wire represents Input 1 (A), wire 2 represents Input 2 (B), and the LED represents the final output. Finally, from the results, we can conclude that the derived configuration of the NAND gates is correct and indeed is equivalent to an OR gate, because the results agree with the truth table of the OR gate shown in Figure 6.

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    10 Discussions

    0
    rajsingh7308
    rajsingh7308

    Question 19 days ago on Introduction

    How to derive expression for AND,OR ,NOT by using NAND gate

    0
    arpanmalewar
    arpanmalewar

    Question 10 months ago on Introduction

    If we connect the output of OR gate to both inputs of nand gate, which gate will be observed

    0
    SHOE0007
    SHOE0007

    1 year ago

    Here a blinker with a NAND gate from the 130 in 1.

    0
    AvinashM38
    AvinashM38

    Question 1 year ago

    Truth table... of Conversion of NAND to AND

    0
    TalalKhalil
    TalalKhalil

    Answer 1 year ago

    NAND = NOT AND
    You can refer to this link for more information.

    0
    RandyA57
    RandyA57

    1 year ago

    Awesome! This was a huge help. Many thanks.

    0
    TalalKhalil
    TalalKhalil

    Reply 1 year ago

    Glad you found it helpful!

    0
    westjim
    westjim

    4 years ago

    1971 I worked for Honeywell Computer. their main frame computer was made up almost entirely of NAND gates. they were mounted on 1 ft square wire wrap boards. and the logic was constructed by automated wire wrap machines.

    0
    TalalKhalil
    TalalKhalil

    Reply 4 years ago

    One of Intel's first memory cells consisted of a clocked JK flip flop, which basically comprised of a clocked cross-coupled NAND gates. It is truly amazing how a complex machine can be broken down into basic principles.

    Thank you for sharing your valuable experience!