Arduino DCF77 Signal Analyzer Clock




Introduction: Arduino DCF77 Signal Analyzer Clock

Arduino DCF77 Clock & Signal Analyzer

You can also see this clock on myweb site here DCF77 Analyzer Clock page

This Clock displays the received & decoded DCF77 time code on three 8x8 dot matrix displays and time, date and signal info on four 8 digit 7 segment displays.
It uses 2 x Atmega 328 microprocessors (Arduino Uno) , 1 to control the DCF77 Analyzer and 1 to control a Udo Klein Super Filter. The Super Filter is switchable and will allow reception of the DCF77 signal from a very noisy signal.

The display auto dims controlled by a LDR and auto shuts down controlled by a PIR when no movement is detected.

See my 4K video of the clock running here

This clock is based on a DCF77 Analyzer Clock by Erik de Ruiter. See picture 3.

Erik has provided full details of his clock here on GitHub
See pictures of his clock here Flickr and his other amazing clocks here Flickr

Step 1: Clock Functions & Features

Receive and display, second by second the DCF77 coded signal from the transmitter in Germany.

Display the received signal on a 8x8 dot-matrix display. Once received and if error checked OK display the stored data on a 2nd 8x8 dot-matrix display, update the real time clock & display time and date on the top two 7 segment display modules.

Display signal error codes, signal status, day of the week and display intensity on a 3rd dot-matrix display If received signal has errors use a real time clock to display the time, picture 1 shows an animation of a complete minute being received into the buffers.

Use four 7 segment display modules to show the buffer, DCF Bit, no of errors, Period Time & Pulse Width.

Switchable DCF77 signal filtering provided on a 2nd Atmega 328 IC using software by Udo Klein Remote controlled individual reset of DCF77 Analyzer & Super Filter, DCF77 sound On/Off and Super Filter status LEDs On/Off.

Picture 2 above shows a close up of front panel.

Picture 3 shows the details of the 3 LED dot matrix displays.

DCF77 code for the next minute is received in the buffer (matrix 1 left) @ 1 bit per second at the end of the minute and if error checked OK the buffer is loaded into the current display store (matrix 2 middle) and the real time clock (RTC) is updated matrix 3 right shows Day of week, display intensity, clock status and clock info

Step 2: The Super Filter

When switched on the Udo Klein's Super Filter actively processes the incoming DCF77 signal from the Antenna/receiver. Over a number of days of learning the Super Filter can predict the DCF77 signal and use this to determine if the incoming signal contains any errors. The Super Filter will then synthesize a corrected DCF77 signal even if the signal is absent.

Picture 1 Super Filter example
The top row shows the Super Filter turned on. Once synchronized and tuned into the signal the Super Filter will synthesize a good signal even when the signal is completely lost. On a noisy signal the Super Filter will search for known signal bits and keep itself synchronized to the transmitter. The bottom row shows the Super Filter turned off. Whatever signal is received (good or bad) is sent to the decoder. Note the Super Filter input is always connected to the incoming DCF77 Signal even if the Super Filter is turned off. As the Super Filter can take a few days to tune to maximum accuracy this ensures it is always tuned/synchronized at maximum accuracy to the DCF77 signal.

Picture 2 shows the Super Filter flow chart.

Step 3: Clock Case

The case for this clock is based on a Tesco Black Glass & Metal Lantern. The case has a hinged door that I have positioned on the right of the clock.

The top glass panels are a good fit for the 3 x dot matrix displays. I have added 18mm MDF top and bottom sections as well as 2 x 6mm plywood pieces to replace the side glass on the small top panels. These panels are sprayed in black silk to match the metal case. The original metal handle on top of the case is cut away and 2 slots to take the remnants of the handle are cut into the top MDF panel. Dimensions H27xW15xD15cm

Step 4: LED Dot Matrix Display Constrution

Picture 01 The display uses 3x 8x8 dot matrix display modules with onboard MAX7219 ICs.

Picture 02 A small aluminium bar is cut to size and 6 x holes are drilled to take the matrix module mounting bolts. Note on pre-built modules the lower connectors may need to be de-soldered and re-soldered on the rear of the boards. Use extra nuts and bolts as spacers over the exposed solder pads as required.

Picture 03. A clear Perspex sheet is then cut to size with mounting holes drilled and is fitted on top of the aluminium bar.

Picture 04. Print out the display on Lazertran decal transfer paper and fix to Perspex sheet making sure it is aligned with the dot matrix modules.

Let the paper dry and don't spray with acrylic varnish to keep the transfer opaque to act as a diffuser for the LEDs.

Picture 05. Add a final sheet of white paper behind the Perspex to complete the diffused effect. The heavier the paper the more diffused (and dimmer) the matrix LEDs will be.

You can offset this effect is the software by setting different intensity values for the 7 segment displays and matrix displays. Note if you don't want to use Lazertran you could print the display on white paper and fix it behind the Perspex.

Pictures 06 & 07. Completed display ready to be mounted into the case.

Step 5: Main Display Board Construction

The main display board to house the four 7 segment displays is made up from 2 Vero boards bolted together with L shaped insulated aluminium angles.

On the finished clock the main Vero Board housing the twin Arduinos is fixed to the top six mounting bolts.

Picture 01 & 02 show Vero boards bolted together to mount displays. Board fronts are sprayed black. Connection strips are soldered to the display boards.

The four 7 segment displays plugged into connection strips, positioned marked by the four labels. Power and serial connections for the displays are run on the front of the display board.

Step 6: Main Display Board Layout

Note board fronts are shown orange for clarity actual board fronts are spay painted black.

Picture 01 Shows front of display boards with 7 segment display connection strips in place.

Picture 02 shows 7 segment display modules mounted along with black wooden blocks for fixing Perspex neutral density contrast display cover. Note black tape colon masking on top display module.

Picture 03 shows 7 segment display modules on without Perspex neutral density contrast display cover. Without this cover the displays are hard to read in bright light.

Picture 04 shows Perspex neutral density contrast display cover with Letroset labeling applied. The perpex cover is fitted behind the main display glass for protection.

Picture 05 same display as picture 03 but with the Perspex neutral density contrast display cover fixed to wooden mounting blocks. The display is now easy to read in all lighting and the PCB and display parts are now hidden from view.

Picture 06 shows the Dot matrix and main display in place in the case.

Step 7: Main Display Board Rear & Main Board Mounting

Picture 01 shows the rear (solder side) of the display boards with the display strips soldered in place.

Picture 02 shows display boards with insulated aluminium angles bolted in place by 8 bolts. This secures the 2 vero boards together.

Picture 03 shows the main board fixed to rear of the display boards between the aluminium angles.

Not shown in the pictures are decoupling capacitors at every display module.

Step 8: Main Vero Board and Display Board Assembly

Pictures 01 & 02 Vero Layout of main board front and rear the Atemga 328 on thel eft controls the DCF77 Analyzer and displays. The Atmega 328 on the right controls the Super Filter.

The toggle switch controls the DCF77 input to the board either direct from the antenna/receiver, the Super Filter or Off no DCF77 Signal.

The wireless receiver, CP2102 with DTR, PIR detector and RTC modules all plug into the board.

Pictures 03 & 04 show the assembled main display board with all components and cable connected ready for installation into the clock.

Step 9: Modification of the RTC Time 7 Segment Display Module to Show Colon Digit Separators

Picture 01 The standard display only has decimal points to separate the digits.

Picture 02 To display colons on digit 3 and 6 these 2 digits are set to display "o" lower case letter O permanently

This illuminates the bottom 4 led segments only.

Picture 03 4 x strips of black plastic tape are then applied over the digits.

Picture 04 When lower case "o" is displayed all you see is colons.

Step 10: PIR Detector Setup & Mounting

Picture 01 shows the standard PIR Module.

Picture 02 shows the infrared diffuser removed. The diffuser is half painted black so it senses from the front half only. The PIR sensing transistor is now exposed.

Picture 03 Shows the underside of the PIR module with the transistor PIR sensor de-soldered.

Picture 04 Shows how the 3 wires to the PIR transistor are connected to the board and then to the transistor.

The module is screwed to the underside of the clock lid with the transistor mounted on the top of the lid.

Picture 05 shows the PIR diffuser in place. The PIR transistor is mounted under the diffuser pointing forward.

Sensitivity and time triggered are adjusted on the 2 presets on the PIR Module board.

Step 11: Remote Control

The remote control has four functions

1. DCF77 Pulse sound On/Off When switched On the incoming DCF77 Pulses can be monitored via the small active buzzer

2. Super Filter Reset This will reset the Super Filter and remove all the learned tuning and will start the Super Filter unsynced. The Super Filter Monitor LEDs if switched on will go out until the Filter resynchronizes itself

3. Super Filter Monitor LEDs These 3 LEDs monitor the function of the Super Filter LED1- DCF77 Second Pulse LED2 DCF77 Signal Good LED3- Synthesized difference

4. DCF77 Analyzer Clock Reset This will reset the clock and displays to zero and the clock will lose any sync it had. If the RTC had been previously set RTC time will be displayed. Note the Super Filter will not be reset and any learned tuning and sync will not be effected.

If remote control is not required then momentary switches can be used instead.

Pictures 01 & 02 The remote control is based on a PT2272 Wireless Receiver Module (433MHz version) and a PT2262 Wireless Transmitter Module (433MHz version)

I use the 433Mhz version here in the UK but there are 315Mhz versions available for use in other countries.
Picture 03 You can get a 315Mhz Transmitter ready built in a key fob including the separate receiver on Ebay. If you go for this option you just plug the receiver into the main display board and you are ready to go. This option does not seem to be available in 433 Mhz.

The 433Mhz option requires either a small remote transmitter to be constructed or a learning key fob can be purchased and learnt from your transmitter.

Picture 04 Remote Control Transmitter for 415Mhz boards
The left four switches mounted on a small piece of vero board. The transmitter is mounted on the reverse along with a 9v battery. See instructions supplied with the module for wiring.

Picture 05 Alternatively a learning key fob can be purchased and can be programmed from the transmitter using

the simple circuit above. A PCB link is used to connected the micro switch to the four inputs in turn so the key fob can be programmed.

Super Filter On/Off Control Switch
A single switch controls the Super Filter and has 3 positions On Super Filter - When On the Super Filter output is connected to the Analyzer Clock DCF77 input and 5v is connected to IC1 pin 5 (IDE pin 3) to light the Super Filter LED on display matrix 3. No Connection- When in this position the Analyzer Clock DCF77 input is not connected to any signal On DCF77 Signal- In this position the Analyzer Clock DCF77 input is connected directly to the DCF77 receiver/antenna. Note in all positions the Super Filter is connected to the directly to the DCF77 receiver/antenna so it alway remains in sync.

Step 12: Reading the Received and Decoded Matrix Buffer Displays Second 00 to 34

Picture 01

The received matrix buffer is on the left and contains the information for the next minute. The display is identical the

decoded matrix in the middle which shows the time, date etc for the current minute. After each minute (if error checking is OK) the Next Minute buffer data is loaded into the Middle Matrix and becomes the Current Minute. DCF77 data is received serially once per second and once the clock is in sync second 0 is loaded into buffer 00 (Matrix position M), second 1 into buffer 01 etc. When a bit value of 1 is received the LED for that segment is lit but will remain unlit if the value is 0.

Picture 02

Second 0 Buffer 00 Matrix Label M
This is the start of the minute and will always be 0.

Picture 03

Second 1 to 14 Buffer 01 to 14 Matrix Label 01 to 14
These bits contain licensed encrypted Weather data for Europe and is used by DCF77 weather clocks. This data is displayed but not used by this clock.

Picture 04

Second 15 Buffer 15 Matrix Label Flt This bit contains transmitter info and is 0 unless there are transmitter problems
Second 16 Buffer 16 Matrix Label LHr Summer time announcement normally 0. Set to 1 during hour before change. Second 17 Buffer 17 Matrix Label CEST Set to 1 when CEST (Central European Summer Time) is in effect. Second 18 Buffer 18 Matrix Label CET Set to 1 when CET (Central European Time) is in effect. Second 19 Buffer 19 Matrix Label LSec Leap second announcement. Set to 1 during hour before leap second.

Picture 05

Second 20 Buffer 20 Matrix Label S Start of encoded time. Always set to 1.

Picture 06

Second 21 to 27 Buffer 21 to 27 Matrix Label 01,02,04,08,10,20 & 40.
These bits contain the minutes and are added together to show minutes from 00 to 59. 21 minutes would have 01 and the 20 LEDs lit, likewise 53 minutes would have 01,02,10 & the 40 LEDs lit

Picture 07

Second 28 Buffer 28 Matrix Label P1
This bit shows even parity over minute bits 21–28. Parity is a basic form of error checking. A Parity bit is added to the end of a string of digits in this case 7 bits from buffer 21 to 27. The Parity bit indicates if the number of 1s in the buffer from 21 to 27 is even or odd. If the number of 1s is even using Even Parity the Parity bit is 0 and if the number of 1s is odd then the Parity bit is 1. For example if the minutes to be transmitted are 5. Buffer Bits (Yellow hi-light above) 01=1, 02=0, 04=1, 08=0, 10=0, 20=0 & 40=0 0r 1010000 if you add the number of 1s together you get 2. This is an even number so the Parity bit transmitted will be 0. Therefore the transmitter will send 1010000 & 0. At the receiver end the receiver does not know what code to expect but it knows to check the parity of bits 21 to 27. If when receiving the bits 21 to 28 a miss reading occurs for example bit 22 is received as a 1 not a 0 the resulting bits would be 11100000. The receiver would expect the last bit (Parity) to be 1 as there are a an odd number of 1s. This indicates an error in the received signal and the received buffer would be rejected as it contains errors.

Picture 08

Second 29 to 34 Buffer 29 to 34 Matrix Label 01,02,04,08,10 & 20.
These bits contain the hours and are added together to show hours from 00 to 23. 10 hours would have only the 10 LED lit , likewise 23 hours would have 01,02 & the 20 LEDs lit

Step 13: Reading the Received and Decoded Matrix Buffer Displays Second 35 to 59

Picture 01

Second 35 Buffer 35 Matrix Label P2

This bit shows even parity over minute bits 29 to 35. See explanation of Parity in P1 (seconds 28 above)

Picture 02

Second 36 to 41 Buffer 36 to 41 Matrix Label 01,02,04,08,10 & 20.
These bits contain the day of the month and are added together to show days from 01 to 31. The 10th of the month would have only the 10 LED lit , likewise the 23rd of the month would have 01,02 & the 20 LEDs lit

Picture 03

Second 42 to 44 Buffer 42 to 44 Matrix Label 01,02 & 04.
These bits contain the day of the week and are added together to show Day of week Monday=1, Sunday=7 Monday would have only the 01 LED lit , likewise Sunday would have the 01,02 & the 04 LEDs lit

Picture 04

Second 45 to 49 Buffer 45 to 49 Matrix Label 01,02, 04, 08 &10
These bits when added together contain the month number and range from 01 to 12. January would have only the 01 LED lit , likewise July would have the 01,02 & the 04 LEDs lit

Picture 05

Second 50 to 57 Buffer 50 to 57 Matrix Label 01,02, 04, 08, 10,20,40 & 80
These bits when added together contain the year number within the centuary and range from 00 to 99. Year 01 would have only the 01 LED lit , likewise the year 99 would have the 01,08, 10, & the 80 LEDs lit

Picture 06

Second 58 Buffer 58 Matrix Label P3
This bit shows even parity over minute bits 36 to 58. See explanation of Parity in P1 (seconds 28 above)

Seconds 59 Buffer 58 Matrix Label On the 59th second the minute mark no 1 or 0 are transmitted indicating the end of the buffer on the next received pulse the buffer is reset to 00.

Step 14: Reading the Day, Display Intensity and Status/Info Matrix Display

The 3rd LED Matrix display shows the Day, the display intensity, the clock status and also info and is split in four sections

Picture 01

This section simply shows the current day illuminated by an LED on the Matrix.

Picture 02

This section of 16 LEDs indicate the auto adjusted Matrix and 7 segment display intensities. The light level is checked once per second and the intensity is adjusted up and down accordingly.

Picture 03

Eight LEDs indicate clock status messages.

DCF: When lit this shows the DCF77 signal is OK Sync: When lit this shows the clock is synchronised to the DCF77 signal

PT: When lit this shows there is an error with the Period Time of the received signal

PW: When lit this indicates an error with the Pulse Width of the received signal

EoB: Lights when buffer is full before end of 60 second cycle

EoM: Lights when buffer is not full at end of 60 second cycle (end mark received too early)

BF: This indicates the Buffer is full and will normally light at the end of the 60 second receiving cycle. If will also light at other times when lots of error pulses are being received. When lit the buffer is reset to 00.

RTC: When there is an error with the Real Time Clock ie no stored time this will light

Picture 04

Eight LEDs indicate clock information

Sig: This LED will flash with the received signal Pulse Width and is not effected by the Super Filter if switched on

Spk: When lit this indicates the received signal speaker is activated and signal pulses can be heard through the speaker

Fltr: When lit the Super Filter is turned on and the incoming signal is being processed and synthesised.

LEDs: When lit the Super Filter monitor LEDs are turned on.

Rmte: Lights when any button on the remote is pressed.

Win: Lights when the clock is in Wintertime

Sum: Lights when the clock is in Summertime

Leap: Light when it is a leap year

Picture 05

This picture show a summary of all the data over a whole minute and the DCF77 Transmitted Code Translation for each Buffer value

Step 15: Schematic

Schematic 01 shows the main board and connection to the external modules.

Schematic 02 shows the connections to the 7 display modules.

A full size schematic can be downloaded from the enclosed zip file.

Step 16: Microcontroller Pin Connection Table

Atmega 328 IC1 & 2 Pin connections and functions

Step 17: Code

The main bulk of this code was written by Erik de Ruiter for his DCF77 Analyzer Clock

Erik has provided full details of his code here on GitHub. I have tried to keep his code as much as possible but as and where I have not used it I have commented it out. Where I have added or modified it I have added a comment starting // Brett

Download code in zip format here DCF77 Analyzer Code

View the code in my web page here View Code

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Question 3 years ago

Hi. I have built the hardware and compiled the software. The display self test routine works as it should. Then the RTC display starts counting (filter or direct), well sort of.. instead of 01,02,03 etc, it shows 10,20,30 etc? The next minute and dcf77 status dot matrix displays do show activity, but never appear to get a proper lock on dcf77. I have run another clock in the same location, which gets a lock in a couple of minutes. I suspect that I am doing something fundamentally stupid, but don't know what it is. Does anything spring to mind? Please :-)


Answer 3 years ago

Off the top of my head and first thing first. lets sort your displays. What sort of 7 segment modules are you using? I used the larger modules on this project. If you are using the smaller modules with a PCB 82mm long by 15mm wide then as I have found on my Mk2 clock the code will need to be modified.


Reply 3 years ago

You are indeed absolutely correct, my displays are 82 * 15mm. It had never occurred to me that there would be differences in serial displays. It looks to me as though the characters L and R are transposed. I have been around with an oscilloscope and there are signals where they apparently should be, dcf77 o/p from Rx, processor pins, processor oscillator only out by a few Hz, etc. So sorry to be a pain, hopefully I can get it running and stop pestering you :-) Thanks


Reply 3 years ago

Hi I am working on a MK2 DCF77 analyzer clock that uses both large and samll 7 segment displays. Here is a link to my code to see how I have modified my code to match the displays This is still very much a work in progress but you should be able to use this code to see how to modify your code. On my new clock large displays are RTC time display and date display. Small displays are used for the last 2 displays eg buffer bits and the pusle displays.

I noticed these small displays gave loads of errors. I found that if I removed the diode and replaced it with a wire and also added a 10micro farad capacitor in the holes on the PCB they worked fine.


Reply 3 years ago

A quick thought on your clock not locking onto your signal. There are 2 types of receivers inverted and non inverted. The superfilter and DCF decoder need to be set to match the type of receiver you use.


Reply 3 years ago

Thanks so much for that, I really appreciate your help. I will certainly try it soon. If it does not solve the problem, I guess I could get the larger LED displays that you mentioned. The DCF signal from my Rx is currently non inverted, but on the Rx there is an inverted output also, so I will investigate that.
I did find that with my rather (unnecessarily) long wiring to the LED displays the signals degraded a bit before the 7th display, so I added some (non inverting) Schmitt buffers, supply rail capacitors, etc and that certainly helped a lot.
I hope you would not mind IF I can get it running, if I add chimes and a few other bits to the code? My software skills are a bit rusty to say the least, but I could probably get there eventually, as long as you don't mind me fooling around with the code. :-)


Reply 3 years ago

I will be adding chimes etc to my Mk2 clock.
Have you looked at Erik de Ruiter's clock
he has added chimes to his. He has a Mk1 and MK2 clock. My code is copied from his and modified to suit.
Please modify my code as you like as that's what I have done with Erik's code. You could always publish your completed clock on this site as I am sure there will be changes other people would like to use.

My coding is my not that good I find it easier to change existing code.

I added full Westminster chimes to this clock using a cheap Ebay module you may find some ideas there. The chimes sounds I recorded are free to download and play with as you wish.


Reply 3 years ago

I rebuilt the circuit all on one PCB, so without the long leads I did have and it works :-)
It does take some considerable time to get valid data, but it works. However, all of the time and date displays are inverted: so 02-32-08 actually displays 20-23-80, the date is the same, so obviously a software thing. I will now try to figure that out (any hints or suggestions would be appreciated. I am using the now modified smaller 8 digit LED displays.


Reply 3 years ago

Hi have a look at my latest code here I have used the smaller displays on display 5 and 6. I think on your version I have commented out the original code to make my large dispalys work. I think that will be displays 3 and 4.
I can't remember if I had said before but there is a diode fitted to the display boards in series with the input. This drops the voltage by about half a volt. In a long line of displays this causes problems. as all the diodes in series add up. I just short the diode out by soldering a link over it. Let me know if you are stil stuck.


3 years ago

Hi. I don't want to be a pest and turn up with endless questions, but would like to build this excellent clock. I got the superfilter software to compile without errors. However, the analyzer software comes up with multiple errors :-( Having said that, I accidentally compiled it for a teensy weensy target and it compiled perfectly! Is there a clue in that, for something that I am obviously doing incorrectly?


Reply 3 years ago

Maybe it's a library issue. Can you paste the error code here?


Reply 3 years ago

You are indeed correct: although I had installed libraries with the correct names, there were obviously subtle and incompatible differences between different versions. I removed all libraries from the library folder and Windows download folder and downloaded and installed them again. As if by magic, it compiled... yaaaaaaaay.
Thank you so much for the prompt reply and offer to help, I appreciate it :-)
Now to "prototyping" the circuit.


3 years ago on Step 14

Hi. Another excellent clock.

However, would you mind amending the links to the code, as following them shows "not authorised to view".
Also, which version of the superfilter is used please.


6 years ago


I posted this as a reply to 4nealalan, rather than directly to you Brett

Hi Brett

Another nice clock, very well done.

I have been playing with another design myself too, but nothing to show for it yet.

I have been trying the DCF decoder used in your example.

But have noticed a problem, I have been using it without a superfilter (although I have one I could try).

I do however I would like to get the decoder working without. I have
noticed however that although I can a get a sync, and the correct time
is displayed, there seems to be no checking made on parity. Therefore I
can suddenly on subsequent minutes, get a completely incorrect time and
or date being display.

for example 34/03/16. The display may then
correct on the completion of the next minute, only to change to some
other incorrect value shortly afterwards.

Have you noticed this ? Do you have any suggestions ?

live just north of London so don't get a brilliant signal, however
using Udo's DCF library my other clocks work really well with no hiccups
at all.

I suspect adding the superfilter will help, but I would
like to get the code working correctly without first, if at all

I have tinkered with the "split times" but doesn't really make much difference.

the code thinks the recieved data is correct and displays it even
though it is significantly different to the previous minute.

Can you think of any suggestions that may help ?

Parity checking improvements perhaps ?

Kind Regards

Pete G0PKH


Reply 6 years ago

Just did the same as you replied to wrong post. :)

Hi Pete. I always have the Super Filter on so have not noticed the problem with the parity check. I have had an email from the chap who designed the original code and it looks like he has sorted the parity problem some time back. He sent me a copy of the updated code to try but I have been too busy to try it as yet. I have emailed him to check if it is OK to pass it on to you to test out. Will PM you as soon as I hear back.




Reply 6 years ago

Hi Brett

Many thanks for coming back to me.

That was very kind to ask the permission from the chap on my behalf and send me the updated code. However maybe it is just me being new to Instructables. I can see I have a patch, but I cannot see how to download or view any of its content. What am I doing wrong ?

Kind regards



Reply 6 years ago

Pete it may be me. Never sent a patch before! If you don't mind, PM me your email address and I will send it again.



Reply 6 years ago

Sent you an email Brett.



6 years ago

Does all power come from the single USB CP210 chip?

It doesn't appear the vero.png image matches the schematics? Is vero.png an old design?

Basically, just removing the SuperFilter atmega328 chip, is there anything that needs to be moved over? Which of the segment displays aren't relevant without the SuperFilter? Buffer? DCF Bit? Errors? Period Time? Pulse Width? Perhaps when the SuperFilter isn't running, one of the bottom two segment displays could be used for the Day of the Week?

An interesting note: The WWVB60 chip comes from the UK - the same manuf of the DCF77 chip.