Introduction: D Flip Flop With Preset and Clear

- The flip flop is a basic building block of sequential logic circuits.

- It is a circuit that has two stable states and can store one bit of state information.

- The output changes state by signals applied to one or more control inputs.

- The basic D Flip Flop has a D (data) input and a clock input and outputs Q and Q (the inverse of Q).

- Optionally it may also include the PR (Preset) and CLR (Clear) control inputs.

Step 1: The Truth Table

The preset and clear input are active-low, because there are an inverting bubble at that input lead on the block symbol, just like the negative edge-trigger clock inputs.

When the preset input is activated, the flip-flop will be reset (Q=0, not-Q=1) regardless of any of the synchronous inputs or the clock. When the clear input is activated, the flip-flop will be set (Q=1, not-Q=0), regardless of any of the synchronous inputs or the clock. So, what happens if both preset and clear inputs are not activated ( both of them 0 ) ? Surprise, surprise: we get an invalid state on the output, where Q and not-Q go to the same state.

when both preset and clear inputs are activated then the flip flop will work normally.

Step 2: Simulation

The figure above shows a simulation example of D flip flop with preset and clear

Step 3: Design and Simulate the D Flip Flop

we will use the circuits-cloud simulator to design and simulate the D flip flop with preset and clear.

http://circuits-cloud.com/

The link of the circuit

http://circuits-cloud.com/circuit/details/DszIhttp://wC...

Step 4: Notes

1. If you are new user for circuits-cloud simulator:

- login

- go to circuit editor

- select the type of simulation in components panel

- just drag and drop the component that you need for your design

- Click and hold to wire the pin between components symbol.

- Make sure all components has been connected.

2. To edit the flip flop parameter, right click > edit parameter > choose either rising edge or falling edge > save parameter

3. To show the simulation, double click on the wire > put a name > click enable prob > save parameter.

3. The inverters after the preset and clear inputs are act as the bubbles.